/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
D | phy_lcn.c | 923 u32 tbl_width, u32 tbl_offset) in wlc_lcnphy_common_read_table() argument 930 tab.tbl_offset = tbl_offset; in wlc_lcnphy_common_read_table() 937 u32 tbl_width, u32 tbl_offset) in wlc_lcnphy_common_write_table() argument 945 tab.tbl_offset = tbl_offset; in wlc_lcnphy_common_write_table() 1899 tab.tbl_offset = 87; in wlc_lcnphy_get_bbmult() 1914 tab.tbl_offset = 87; in wlc_lcnphy_set_bbmult() 1933 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET; in wlc_lcnphy_clear_tx_power_offsets() 1938 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_MAC_OFFSET; in wlc_lcnphy_clear_tx_power_offsets() 2082 tab.tbl_offset = 0; in wlc_lcnphy_tssi_setup() 2085 tab.tbl_offset++; in wlc_lcnphy_tssi_setup() [all …]
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D | phy_cmn.c | 822 wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id, uint tbl_offset, in wlc_phy_table_addr() argument 825 write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); in wlc_phy_table_addr() 834 pi->tbl_save_offset = tbl_offset; in wlc_phy_table_addr() 864 uint tbl_offset = ptbl_info->tbl_offset; in wlc_phy_write_table() local 870 write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); in wlc_phy_write_table() 880 (tbl_id << 10) | (tbl_offset + idx)); in wlc_phy_write_table() 901 uint tbl_offset = ptbl_info->tbl_offset; in wlc_phy_read_table() local 907 write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); in wlc_phy_read_table() 916 (tbl_id << 10) | (tbl_offset + idx)); in wlc_phy_read_table()
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D | phy_hal.h | 272 s8 wlc_phy_get_tx_power_offset(struct brcms_phy_pub *ppi, u8 tbl_offset);
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D | phy_int.h | 242 u32 tbl_offset; member 920 void wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id, uint tbl_offset,
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D | phy_n.c | 14157 tbl.tbl_offset = offset; in wlc_phy_table_write_nphy() 14171 tbl.tbl_offset = offset; in wlc_phy_table_read_nphy() 17574 u32 tbl_id, tbl_len, tbl_offset; in wlc_phy_txpwrctrl_pwr_setup_nphy() local 17743 tbl_offset = 0; in wlc_phy_txpwrctrl_pwr_setup_nphy() 17762 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, in wlc_phy_txpwrctrl_pwr_setup_nphy() 18800 u32 tbl_id, tbl_len, tbl_offset; in wlc_phy_txpwrctrl_coeff_setup_nphy() local 18809 tbl_offset = 320; in wlc_phy_txpwrctrl_coeff_setup_nphy() 18821 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, in wlc_phy_txpwrctrl_coeff_setup_nphy() 18825 tbl_offset = 448; in wlc_phy_txpwrctrl_coeff_setup_nphy() 18850 wlc_phy_table_write_nphy(pi, tbl_id, tbl_len, tbl_offset, 32, in wlc_phy_txpwrctrl_coeff_setup_nphy() [all …]
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/drivers/pci/controller/cadence/ |
D | pcie-cadence-ep.c | 388 u32 tbl_offset, msg_data, reg; in cdns_pcie_ep_send_msix_irq() local 403 tbl_offset = cdns_pcie_ep_fn_readl(pcie, fn, reg); in cdns_pcie_ep_send_msix_irq() 404 bir = tbl_offset & PCI_MSIX_TABLE_BIR; in cdns_pcie_ep_send_msix_irq() 405 tbl_offset &= PCI_MSIX_TABLE_OFFSET; in cdns_pcie_ep_send_msix_irq() 408 msix_tbl = epf->epf_bar[bir]->addr + tbl_offset; in cdns_pcie_ep_send_msix_irq()
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/drivers/pci/controller/dwc/ |
D | pcie-designware-ep.c | 573 u32 tbl_offset; in dw_pcie_ep_raise_msix_irq() local 585 tbl_offset = dw_pcie_readl_dbi(pci, reg); in dw_pcie_ep_raise_msix_irq() 586 bir = (tbl_offset & PCI_MSIX_TABLE_BIR); in dw_pcie_ep_raise_msix_irq() 587 tbl_offset &= PCI_MSIX_TABLE_OFFSET; in dw_pcie_ep_raise_msix_irq() 589 msix_tbl = ep->epf_bar[bir]->addr + tbl_offset; in dw_pcie_ep_raise_msix_irq()
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/drivers/net/ethernet/marvell/ |
D | mvneta.c | 1597 unsigned int tbl_offset; in mvneta_set_ucast_addr() local 1604 tbl_offset = (last_nibble / 4) * 4; in mvneta_set_ucast_addr() 1609 unicast_reg = mvreg_read(pp, (MVNETA_DA_FILT_UCAST_BASE + tbl_offset)); in mvneta_set_ucast_addr() 1619 mvreg_write(pp, (MVNETA_DA_FILT_UCAST_BASE + tbl_offset), unicast_reg); in mvneta_set_ucast_addr() 2930 unsigned int tbl_offset; in mvneta_set_special_mcast_addr() local 2934 tbl_offset = (last_byte / 4); in mvneta_set_special_mcast_addr() 2939 + tbl_offset * 4)); in mvneta_set_special_mcast_addr() 2948 mvreg_write(pp, MVNETA_DA_FILT_SPEC_MCAST + tbl_offset * 4, in mvneta_set_special_mcast_addr() 2965 unsigned int tbl_offset; in mvneta_set_other_mcast_addr() local 2968 tbl_offset = (crc8 / 4) * 4; /* Register offset from OMC table base */ in mvneta_set_other_mcast_addr() [all …]
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/drivers/net/ethernet/cavium/thunder/ |
D | nic.h | 495 u8 tbl_offset; member
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D | nicvf_main.c | 344 mbx.rss_cfg.tbl_offset = nextq; in nicvf_config_rss() 347 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ? in nicvf_config_rss()
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D | nic_main.c | 571 rssi_base = nic->rssi_base[cfg->vf_id] + cfg->tbl_offset; in nic_config_rss()
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