Home
last modified time | relevance | path

Searched refs:timers (Results 1 – 25 of 29) sorted by relevance

12

/drivers/staging/media/atomisp/pci/
Dgp_timer_defs.h24 #define HIVE_GP_TIMER_VALUE_REG_IDX(timer, timers) (HIVE_GP_TIMER_ENABLE_REG_IDX(time… argument
25 …efine HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer, timers) (HIVE_GP_TIMER_VALUE_REG_IDX(timers… argument
26 …e HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(timer, timers) (HIVE_GP_TIMER_COUNT_TYPE_REG_IDX(timer… argument
27 …HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(irq, timers) (HIVE_GP_TIMER_SIGNAL_SELECT_REG_IDX(time… argument
28 …IVE_GP_TIMER_IRQ_TIMER_SELECT_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TRIGGER_VALUE_REG_IDX(… argument
29 …e HIVE_GP_TIMER_IRQ_ENABLE_REG_IDX(irq, timers, irqs) (HIVE_GP_TIMER_IRQ_TIMER_SELECT_REG_ID… argument
/drivers/clocksource/
Dbcm_kona_timer.c42 static struct kona_bcm_timers timers; variable
118 ret = kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); in kona_timer_set_next_event()
123 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET); in kona_timer_set_next_event()
126 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
128 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
135 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_shutdown()
158 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_interrupt()
181 timers.tmr_irq = irq_of_parse_and_map(node, 0); in kona_timer_init()
184 timers.tmr_regs = of_iomap(node, 0); in kona_timer_init()
186 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_init()
[all …]
Dtimer-probe.c21 unsigned timers = 0; in timer_probe() local
38 timers++; in timer_probe()
41 timers += acpi_probe_device_table(timer); in timer_probe()
43 if (!timers) in timer_probe()
Dingenic-timer.c47 struct ingenic_tcu_timer timers[]; member
70 return container_of(timer, struct ingenic_tcu, timers[timer->cpu]); in to_ingenic_tcu()
144 struct ingenic_tcu_timer *timer = &tcu->timers[cpu]; in ingenic_tcu_setup_cevt()
289 tcu = kzalloc(struct_size(tcu, timers, num_possible_cpus()), in ingenic_tcu_init()
317 timer = &tcu->timers[cpu]; in ingenic_tcu_init()
379 clk_disable(tcu->timers[cpu].clk); in ingenic_tcu_suspend()
391 ret = clk_enable(tcu->timers[cpu].clk); in ingenic_tcu_resume()
404 clk_disable(tcu->timers[cpu - 1].clk); in ingenic_tcu_resume()
Darm_arch_timer.c1556 struct arch_timer_mem *timers, *timer; in arch_timer_mem_acpi_init() local
1560 timers = kcalloc(platform_timer_count, sizeof(*timers), in arch_timer_mem_acpi_init()
1562 if (!timers) in arch_timer_mem_acpi_init()
1565 ret = acpi_arch_timer_mem_init(timers, &timer_count); in arch_timer_mem_acpi_init()
1574 timer = &timers[i]; in arch_timer_mem_acpi_init()
1598 kfree(timers); in arch_timer_mem_acpi_init()
DKconfig253 Support to use the timers of EFM32 SoCs as clock source and clock
320 This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP).
475 This enables support for the Oxford Semiconductor OXNAS RPS timers.
655 This option enables support for the Andestech ATCPIT100 timers.
/drivers/remoteproc/
Domap_remoteproc.c110 struct omap_rproc_timer *timers; member
276 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_watchdog_isr() local
282 if (timers[i].irq > 0 && irq == timers[i].irq) { in omap_rproc_watchdog_isr()
283 wd_timer = &timers[i]; in omap_rproc_watchdog_isr()
320 struct omap_rproc_timer *timers = oproc->timers; in omap_rproc_enable_timers() local
372 timers[i].irq = -1; in omap_rproc_enable_timers()
373 timers[i].timer_ops = timer_ops; in omap_rproc_enable_timers()
374 ret = omap_rproc_request_timer(dev, np, &timers[i]); in omap_rproc_enable_timers()
383 timers[i].irq = omap_rproc_get_timer_irq(&timers[i]); in omap_rproc_enable_timers()
384 if (timers[i].irq < 0) { in omap_rproc_enable_timers()
[all …]
/drivers/leds/
Dleds-netxbig.c428 struct netxbig_led_timer *timers; in netxbig_leds_get_of_pdata() local
469 timers = devm_kcalloc(dev, num_timers, sizeof(*timers), in netxbig_leds_get_of_pdata()
471 if (!timers) { in netxbig_leds_get_of_pdata()
479 &timers[i].mode); in netxbig_leds_get_of_pdata()
480 if (timers[i].mode >= NETXBIG_LED_MODE_NUM) { in netxbig_leds_get_of_pdata()
486 timers[i].delay_on = tmp; in netxbig_leds_get_of_pdata()
489 timers[i].delay_off = tmp; in netxbig_leds_get_of_pdata()
491 pdata->timer = timers; in netxbig_leds_get_of_pdata()
/drivers/misc/
Dcs5535-mfgpt.c291 int timers = 0; in scan_timers() local
308 timers++; in scan_timers()
313 return timers; in scan_timers()
DKconfig205 drivers that need timers. MFGPTs are available in the CS5535 and
208 than the generic PIT, and are suitable for use as high-res timers.
230 generic PIT, and are suitable for use as high-res timers.
/drivers/net/wireguard/
DMakefile7 wireguard-y += timers.o
/drivers/usb/host/
Dr8a66597-hcd.c1261 mod_timer(&r8a66597->timers[td->pipenum].td, in set_td_timer()
1723 struct r8a66597_timers *timers = from_timer(timers, t, interval); in r8a66597_interval_timer() local
1724 struct r8a66597 *r8a66597 = timers->r8a66597; in r8a66597_interval_timer()
1734 if (timer_pending(&r8a66597->timers[pipenum].interval)) in r8a66597_interval_timer()
1747 struct r8a66597_timers *timers = from_timer(timers, t, td); in r8a66597_td_timer() local
1748 struct r8a66597 *r8a66597 = timers->r8a66597; in r8a66597_td_timer()
1758 if (timer_pending(&r8a66597->timers[pipenum].td)) in r8a66597_td_timer()
1932 mod_timer(&r8a66597->timers[td->pipenum].interval, in r8a66597_urb_enqueue()
2481 r8a66597->timers[i].r8a66597 = r8a66597; in r8a66597_probe()
2482 timer_setup(&r8a66597->timers[i].td, r8a66597_td_timer, 0); in r8a66597_probe()
[all …]
Dr8a66597.h115 struct r8a66597_timers timers[R8A66597_MAX_NUM_PIPE]; member
/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dmac80211_if.c318 for (t = wl->timers; t; t = next) { in brcms_free()
1506 t->next = wl->timers; in brcms_init_timer()
1507 wl->timers = t; in brcms_init_timer()
1571 if (wl->timers == t) { in brcms_free_timer()
1572 wl->timers = wl->timers->next; in brcms_free_timer()
1581 tmp = wl->timers; in brcms_free_timer()
Dmac80211_if.h78 struct brcms_timer *timers; /* timer cleanup queue */ member
/drivers/misc/ocxl/
Dconfig.c803 u8 timers; in ocxl_config_set_TL() local
887 timers = 0x2 << 4; /* long timer = 1.6 us */ in ocxl_config_set_TL()
889 timers); in ocxl_config_set_TL()
/drivers/iio/trigger/
DKconfig14 timers as interrupt source.
/drivers/isdn/hardware/mISDN/
Dhfcsusb.c635 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
642 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
645 hw->timers |= NT_ACTIVATION_TIMER; in ph_state_nt()
653 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
661 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
1360 && (hw->timers & NT_ACTIVATION_TIMER)) { in tx_iso_complete()
Dhfcsusb.h304 __u8 timers; member
/drivers/net/wireless/ath/ath9k/
Dhw.c3148 timer_table->timers[timer_index] = timer; in ath_gen_timer_alloc()
3250 timer_table->timers[timer->index] = NULL; in ath_gen_timer_free()
3271 for_each_set_bit(index, &thresh_mask, ARRAY_SIZE(timer_table->timers)) { in ath_gen_timer_isr()
3272 timer = timer_table->timers[index]; in ath_gen_timer_isr()
3282 for_each_set_bit(index, &trigger_mask, ARRAY_SIZE(timer_table->timers)) { in ath_gen_timer_isr()
3283 timer = timer_table->timers[index]; in ath_gen_timer_isr()
/drivers/net/ethernet/chelsio/cxgb3/
Dt3_hw.c2609 unsigned int timers = 0, timers_shift = 22; in partition_mem() local
2613 timers = 1; in partition_mem()
2616 timers = 2; in partition_mem()
2619 timers = 3; in partition_mem()
2646 t3_write_reg(adap, A_TP_CMM_TIMER_BASE, V_CMTIMERMAXNUM(timers) | m); in partition_mem()
/drivers/acpi/
DKconfig230 Time Clock (RTC). Its wake timers allow the system to transition from
233 scale of flexibility in the wake timers. The time capabilities of the
/drivers/mfd/
DMakefile257 obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o
/drivers/char/
DKconfig405 open selects one of the timers supported by the HPET. The timers are
/drivers/net/ethernet/intel/i40e/
Di40e_type.h1389 u16 timers; member

12