| /drivers/mailbox/ |
| D | arm_mhu.c | 29 void __iomem *tx_reg; member
60 u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); in mhu_last_tx_done()
70 writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS); in mhu_send_data()
81 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); in mhu_startup()
82 writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS); in mhu_startup()
134 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in mhu_probe()
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| D | platform_mhu.c | 35 void __iomem *tx_reg; member
66 u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); in platform_mhu_last_tx_done()
76 writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS); in platform_mhu_send_data()
87 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS); in platform_mhu_startup()
88 writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS); in platform_mhu_startup()
145 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in platform_mhu_probe()
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| D | arm_mhu_db.c | 35 void __iomem *tx_reg; member
141 void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; in mhu_db_last_tx_done()
152 void __iomem *base = chan_info->mhu->mlink[chan_info->pchan].tx_reg; in mhu_db_send_data()
318 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in mhu_db_probe()
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| /drivers/net/wireless/ath/ath5k/ |
| D | dma.c | 355 u16 tx_reg; in ath5k_hw_get_txdp() local
366 tx_reg = AR5K_NOQCU_TXDP0; in ath5k_hw_get_txdp()
370 tx_reg = AR5K_NOQCU_TXDP1; in ath5k_hw_get_txdp()
376 tx_reg = AR5K_QUEUE_TXDP(queue); in ath5k_hw_get_txdp()
379 return ath5k_hw_reg_read(ah, tx_reg); in ath5k_hw_get_txdp()
398 u16 tx_reg; in ath5k_hw_set_txdp() local
409 tx_reg = AR5K_NOQCU_TXDP0; in ath5k_hw_set_txdp()
413 tx_reg = AR5K_NOQCU_TXDP1; in ath5k_hw_set_txdp()
427 tx_reg = AR5K_QUEUE_TXDP(queue); in ath5k_hw_set_txdp()
431 ath5k_hw_reg_write(ah, phys_addr, tx_reg); in ath5k_hw_set_txdp()
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| /drivers/spi/ |
| D | spi-orion.c | 370 void __iomem *tx_reg, *rx_reg, *int_reg; in orion_spi_write_read_8bit() local
374 tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG); in orion_spi_write_read_8bit()
382 writel(*(*tx_buf)++, tx_reg); in orion_spi_write_read_8bit()
384 writel(0, tx_reg); in orion_spi_write_read_8bit()
401 void __iomem *tx_reg, *rx_reg, *int_reg; in orion_spi_write_read_16bit() local
405 tx_reg = spi_reg(orion_spi, ORION_SPI_DATA_OUT_REG); in orion_spi_write_read_16bit()
413 writel(__cpu_to_le16(get_unaligned((*tx_buf)++)), tx_reg); in orion_spi_write_read_16bit()
415 writel(0, tx_reg); in orion_spi_write_read_16bit()
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| D | spi-omap2-mcspi.c | 694 void __iomem *tx_reg; in omap2_mcspi_txrx_pio() local
707 tx_reg = base + OMAP2_MCSPI_TX0; in omap2_mcspi_txrx_pio()
731 writel_relaxed(*tx++, tx_reg); in omap2_mcspi_txrx_pio()
778 writel_relaxed(*tx++, tx_reg); in omap2_mcspi_txrx_pio()
825 writel_relaxed(*tx++, tx_reg); in omap2_mcspi_txrx_pio()
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| D | spi-topcliff-pch.c | 873 param->tx_reg = data->io_base_addr + PCH_SPDWR; in pch_spi_request_dma()
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| /drivers/dma/ |
| D | txx9dmac.c | 351 if (ds->tx_reg) { in txx9dmac_dostart()
372 if (ds->tx_reg) { in txx9dmac_dostart()
818 if (ds->tx_reg) in txx9dmac_prep_slave_sg()
843 desc->hwdesc.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
852 desc->hwdesc32.DAR = ds->tx_reg; in txx9dmac_prep_slave_sg()
1011 (ds->tx_reg && ds->rx_reg) || (!ds->tx_reg && !ds->rx_reg)) in txx9dmac_alloc_chan_resources()
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| D | pch_dma.c | 588 reg = pd_slave->tx_reg; in pd_prep_slave_sg()
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| /drivers/media/rc/ |
| D | ene_ir.h | 209 int tx_reg; /* current reg used for TX */ member
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| D | ene_ir.c | 653 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx); in ene_tx_sample()
655 dev->tx_reg = !dev->tx_reg; in ene_tx_sample()
964 dev->tx_reg = 0; in ene_transmit()
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| /drivers/slimbus/ |
| D | qcom-ctrl.c | 121 u8 len, u32 tx_reg) in qcom_slim_queue_tx() argument
125 __iowrite32_copy(ctrl->base + tx_reg, buf, count); in qcom_slim_queue_tx()
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| /drivers/net/ethernet/intel/i40e/ |
| D | i40e_main.c | 4467 u32 tx_reg; in i40e_pf_txq_wait() local
4470 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q)); in i40e_pf_txq_wait()
4471 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) in i40e_pf_txq_wait()
4495 u32 tx_reg; in i40e_control_tx_q() local
4504 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q)); in i40e_control_tx_q()
4505 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) == in i40e_control_tx_q()
4506 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1)) in i40e_control_tx_q()
4512 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK)) in i40e_control_tx_q()
4518 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK; in i40e_control_tx_q()
4520 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK; in i40e_control_tx_q()
[all …]
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| /drivers/tty/serial/ |
| D | pch_uart.c | 709 param->tx_reg = port->mapbase + UART_TX; in pch_request_dma()
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