| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_link_encoder.h | 218 #define DCN_LINK_ENCODER_REG_FIELD_LIST(type) \ argument
219 type DIG_ENABLE;\
220 type DIG_HPD_SELECT;\
221 type DIG_MODE;\
222 type DIG_FE_SOURCE_SELECT;\
223 type DPHY_BYPASS;\
224 type DPHY_ATEST_SEL_LANE0;\
225 type DPHY_ATEST_SEL_LANE1;\
226 type DPHY_ATEST_SEL_LANE2;\
227 type DPHY_ATEST_SEL_LANE3;\
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| D | dcn10_dpp.h | 473 #define TF_REG_FIELD_LIST(type) \ argument
474 type EXT_OVERSCAN_LEFT; \
475 type EXT_OVERSCAN_RIGHT; \
476 type EXT_OVERSCAN_BOTTOM; \
477 type EXT_OVERSCAN_TOP; \
478 type OTG_H_BLANK_START; \
479 type OTG_H_BLANK_END; \
480 type OTG_V_BLANK_START; \
481 type OTG_V_BLANK_END; \
482 type PIXEL_DEPTH; \
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| D | dcn10_optc.h | 326 #define TG_REG_FIELD_LIST_DCN1_0(type) \ argument
327 type VSTARTUP_START;\
328 type VUPDATE_OFFSET;\
329 type VUPDATE_WIDTH;\
330 type VREADY_OFFSET;\
331 type OTG_BLANK_DATA_EN;\
332 type OTG_BLANK_DE_MODE;\
333 type OTG_CURRENT_BLANK_STATE;\
334 type OTG_MASTER_UPDATE_LOCK;\
335 type UPDATE_LOCK_STATUS;\
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| D | dcn10_stream_encoder.h | 332 #define SE_REG_FIELD_LIST_DCN1_0(type) \ argument
333 type AFMT_GENERIC_INDEX;\
334 type AFMT_GENERIC_HB0;\
335 type AFMT_GENERIC_HB1;\
336 type AFMT_GENERIC_HB2;\
337 type AFMT_GENERIC_HB3;\
338 type AFMT_GENERIC_LOCK_STATUS;\
339 type AFMT_GENERIC_CONFLICT;\
340 type AFMT_GENERIC_CONFLICT_CLR;\
341 type AFMT_GENERIC0_FRAME_UPDATE_PENDING;\
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| D | dcn10_hubbub.h | 188 #define DCN_HUBBUB_REG_FIELD_LIST(type) \ argument
189 type DCHUBBUB_GLOBAL_TIMER_ENABLE; \
190 type DCHUBBUB_ARB_WATERMARK_CHANGE_REQUEST;\
191 type DCHUBBUB_ARB_WATERMARK_CHANGE_DONE_INTERRUPT_DISABLE;\
192 type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_VALUE;\
193 type DCHUBBUB_ARB_ALLOW_SELF_REFRESH_FORCE_ENABLE;\
194 type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_VALUE;\
195 type DCHUBBUB_ARB_ALLOW_PSTATE_CHANGE_FORCE_ENABLE;\
196 type DCHUBBUB_ARB_SAT_LEVEL;\
197 type DCHUBBUB_ARB_MIN_REQ_OUTSTAND;\
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| D | dcn10_hubp.h | 450 #define DCN_HUBP_REG_FIELD_BASE_LIST(type) \ argument
451 type HUBP_BLANK_EN;\
452 type HUBP_DISABLE;\
453 type HUBP_TTU_DISABLE;\
454 type HUBP_NO_OUTSTANDING_REQ;\
455 type HUBP_VTG_SEL;\
456 type HUBP_UNDERFLOW_STATUS;\
457 type HUBP_UNDERFLOW_CLEAR;\
458 type NUM_PIPES;\
459 type NUM_BANKS;\
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| D | dcn10_dwb.h | 150 #define DWBC_REG_FIELD_LIST(type) \ argument
151 type WB_ENABLE;\
152 type DISPCLK_R_WB_GATE_DIS;\
153 type DISPCLK_G_WB_GATE_DIS;\
154 type DISPCLK_G_WBSCL_GATE_DIS;\
155 type WB_LB_LS_DIS;\
156 type WB_LB_SD_DIS;\
157 type WB_LUT_LS_DIS;\
158 type CNV_WINDOW_CROP_EN;\
159 type CNV_STEREO_TYPE;\
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| D | dcn10_opp.h | 102 #define OPP_DCN10_REG_FIELD_LIST(type) \ argument
103 type FMT_TRUNCATE_EN; \
104 type FMT_TRUNCATE_DEPTH; \
105 type FMT_TRUNCATE_MODE; \
106 type FMT_SPATIAL_DITHER_EN; \
107 type FMT_SPATIAL_DITHER_MODE; \
108 type FMT_SPATIAL_DITHER_DEPTH; \
109 type FMT_TEMPORAL_DITHER_EN; \
110 type FMT_HIGHPASS_RANDOM_ENABLE; \
111 type FMT_FRAME_RANDOM_ENABLE; \
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dwb.h | 424 #define DWBC_REG_FIELD_LIST_DCN3_0(type) \ argument
425 type DWB_ENABLE;\
426 type DISPCLK_R_DWB_GATE_DIS;\
427 type DISPCLK_G_DWB_GATE_DIS;\
428 type DWB_TEST_CLK_SEL;\
429 type DWBSCL_LUT_MEM_PWR_FORCE;\
430 type DWBSCL_LUT_MEM_PWR_DIS;\
431 type DWBSCL_LUT_MEM_PWR_STATE;\
432 type DWBSCL_LB_MEM_PWR_FORCE;\
433 type DWBSCL_LB_MEM_PWR_DIS;\
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_dsc.h | 263 #define DSC_FIELD_LIST_DCN20(type)\ argument
264 type DSC_CLOCK_EN; \
265 type DSC_DISPCLK_R_GATE_DIS; \
266 type DSC_DSCCLK_R_GATE_DIS; \
267 type DSC_DBG_EN; \
268 type DSC_TEST_CLOCK_MUX_SEL; \
269 type ICH_RESET_AT_END_OF_LINE; \
270 type NUMBER_OF_SLICES_PER_LINE; \
271 type ALTERNATE_ICH_ENCODING_EN; \
272 type NUMBER_OF_SLICES_IN_VERTICAL_DIRECTION; \
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| D | dcn20_mmhubbub.h | 259 #define MCIF_WB_REG_FIELD_LIST_DCN2_0(type) \ argument
260 type MCIF_WB_BUFMGR_ENABLE;\
261 type MCIF_WB_BUFMGR_SW_INT_EN;\
262 type MCIF_WB_BUFMGR_SW_INT_ACK;\
263 type MCIF_WB_BUFMGR_SW_SLICE_INT_EN;\
264 type MCIF_WB_BUFMGR_SW_OVERRUN_INT_EN;\
265 type MCIF_WB_BUFMGR_SW_LOCK;\
266 type MCIF_WB_P_VMID;\
267 type MCIF_WB_BUF_ADDR_FENCE_EN;\
268 type MCIF_WB_BUFMGR_CUR_LINE_R;\
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| D | dcn20_dwb.h | 229 #define DWBC_REG_FIELD_LIST_DCN2_0(type) \ argument
230 type WB_ENABLE;\
231 type DISPCLK_R_WB_GATE_DIS;\
232 type DISPCLK_G_WB_GATE_DIS;\
233 type DISPCLK_G_WBSCL_GATE_DIS;\
234 type WB_TEST_CLK_SEL;\
235 type WB_LB_LS_DIS;\
236 type WB_LB_SD_DIS;\
237 type WB_LUT_LS_DIS;\
238 type WBSCL_LB_MEM_PWR_MODE_SEL;\
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| D | dcn20_hubp.h | 166 #define DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type) \ argument
167 DCN_HUBP_REG_FIELD_BASE_LIST(type); \
168 type DMDATA_ADDRESS_HIGH;\
169 type DMDATA_MODE;\
170 type DMDATA_UPDATED;\
171 type DMDATA_REPEAT;\
172 type DMDATA_SIZE;\
173 type DMDATA_SW_UPDATED;\
174 type DMDATA_SW_REPEAT;\
175 type DMDATA_SW_SIZE;\
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| D | dcn20_mpc.h | 199 #define MPC_REG_FIELD_LIST_DCN2_0(type) \ argument
200 MPC_REG_FIELD_LIST(type)\
201 type MPCC_BG_BPC;\
202 type MPCC_BOT_GAIN_MODE;\
203 type MPCC_TOP_GAIN;\
204 type MPCC_BOT_GAIN_INSIDE;\
205 type MPCC_BOT_GAIN_OUTSIDE;\
206 type MPC_OCSC_TEST_DEBUG_DATA_OCSC_MODE;\
207 type MPC_OCSC_TEST_DEBUG_INDEX;\
208 type MPC_OCSC_MODE;\
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| /drivers/media/pci/saa7134/ |
| D | saa7134-cards.c | 65 .type = SAA7134_INPUT_COMPOSITE,
80 .type = SAA7134_INPUT_COMPOSITE1,
84 .type = SAA7134_INPUT_TV,
88 .type = SAA7134_INPUT_TV_MONO,
93 .type = SAA7134_INPUT_RADIO,
108 .type = SAA7134_INPUT_TV,
113 .type = SAA7134_INPUT_TV_MONO,
118 .type = SAA7134_INPUT_COMPOSITE1,
123 .type = SAA7134_INPUT_COMPOSITE2,
128 .type = SAA7134_INPUT_SVIDEO,
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| /drivers/vfio/mdev/ |
| D | mdev_sysfs.c | 25 struct mdev_type *type = to_mdev_type(kobj); in mdev_type_attr_show() local
29 ret = attr->show(kobj, type->parent->dev, buf); in mdev_type_attr_show()
38 struct mdev_type *type = to_mdev_type(kobj); in mdev_type_attr_store() local
42 ret = attr->store(&type->kobj, type->parent->dev, buf, count); in mdev_type_attr_store()
81 struct mdev_type *type = to_mdev_type(kobj); in mdev_type_release() local
84 kfree(type); in mdev_type_release()
95 struct mdev_type *type; in add_mdev_supported_type() local
103 type = kzalloc(sizeof(*type), GFP_KERNEL); in add_mdev_supported_type()
104 if (!type) in add_mdev_supported_type()
107 type->kobj.kset = parent->mdev_types_kset; in add_mdev_supported_type()
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| /drivers/net/wireless/intel/iwlwifi/mvm/ |
| D | rs.h | 166 enum iwl_table_type type; member
176 #define is_type_legacy(type) (((type) == LQ_LEGACY_G) || \ argument
177 ((type) == LQ_LEGACY_A))
178 #define is_type_ht_siso(type) ((type) == LQ_HT_SISO) argument
179 #define is_type_ht_mimo2(type) ((type) == LQ_HT_MIMO2) argument
180 #define is_type_vht_siso(type) ((type) == LQ_VHT_SISO) argument
181 #define is_type_vht_mimo2(type) ((type) == LQ_VHT_MIMO2) argument
182 #define is_type_he_siso(type) ((type) == LQ_HE_SISO) argument
183 #define is_type_he_mimo2(type) ((type) == LQ_HE_MIMO2) argument
184 #define is_type_siso(type) (is_type_ht_siso(type) || is_type_vht_siso(type) || \ argument
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| /drivers/media/pci/cx88/ |
| D | cx88-cards.c | 59 .type = CX88_VMUX_COMPOSITE1,
62 .type = CX88_VMUX_COMPOSITE2,
65 .type = CX88_VMUX_COMPOSITE3,
68 .type = CX88_VMUX_COMPOSITE4,
80 .type = CX88_VMUX_TELEVISION,
84 .type = CX88_VMUX_DEBUG,
88 .type = CX88_VMUX_COMPOSITE1,
92 .type = CX88_VMUX_SVIDEO,
97 .type = CX88_RADIO,
108 .type = CX88_VMUX_TELEVISION,
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| /drivers/md/ |
| D | dm-exception-store.c | 24 struct dm_exception_store_type *type; in __find_exception_store_type() local
26 list_for_each_entry(type, &_exception_store_types, list) in __find_exception_store_type()
27 if (!strcmp(name, type->name)) in __find_exception_store_type()
28 return type; in __find_exception_store_type()
35 struct dm_exception_store_type *type; in _get_exception_store_type() local
39 type = __find_exception_store_type(name); in _get_exception_store_type()
41 if (type && !try_module_get(type->module)) in _get_exception_store_type()
42 type = NULL; in _get_exception_store_type()
46 return type; in _get_exception_store_type()
75 struct dm_exception_store_type *type; in get_type() local
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| /drivers/hwmon/ |
| D | ibmpowernv.c | 77 enum sensors type; member
114 if (sdata->type == TEMP) in show_sensor()
117 else if (sdata->type == POWER_INPUT) in show_sensor()
248 static const char *convert_opal_attr_name(enum sensors type, in convert_opal_attr_name() argument
258 if (type == TEMP) in convert_opal_attr_name()
260 else if (type == FAN) in convert_opal_attr_name()
274 enum sensors type, u32 *index) in parse_opal_node_name() argument
284 attr_name = convert_opal_attr_name(type, attr_suffix); in parse_opal_node_name()
293 enum sensors type; in get_sensor_type() local
296 for (type = 0; type < ARRAY_SIZE(legacy_compatibles); type++) { in get_sensor_type()
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| /drivers/net/ethernet/netronome/nfp/ |
| D | nfp_app.h | 134 enum tc_setup_type type, void *type_data);
170 const struct nfp_app_type *type; member
184 if (!app->type->init) in nfp_app_init()
186 return app->type->init(app); in nfp_app_init()
191 if (app->type->clean) in nfp_app_clean()
192 app->type->clean(app); in nfp_app_clean()
201 return app->type->vnic_alloc(app, nn, id); in nfp_app_vnic_alloc()
206 if (app->type->vnic_free) in nfp_app_vnic_free()
207 app->type->vnic_free(app, nn); in nfp_app_vnic_free()
212 if (!app->type->vnic_init) in nfp_app_vnic_init()
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| /drivers/media/tuners/ |
| D | tuner-xc2028.c | 77 unsigned int type; member
85 unsigned int type; member
176 static void dump_firm_type_and_int_freq(unsigned int type, u16 int_freq) in dump_firm_type_and_int_freq() argument
178 if (type & BASE) in dump_firm_type_and_int_freq()
180 if (type & INIT1) in dump_firm_type_and_int_freq()
182 if (type & F8MHZ) in dump_firm_type_and_int_freq()
184 if (type & MTS) in dump_firm_type_and_int_freq()
186 if (type & D2620) in dump_firm_type_and_int_freq()
188 if (type & D2633) in dump_firm_type_and_int_freq()
190 if (type & DTV6) in dump_firm_type_and_int_freq()
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| D | tuner-types.c | 72 .type = TUNER_PARAM_TYPE_PAL,
88 .type = TUNER_PARAM_TYPE_PAL,
104 .type = TUNER_PARAM_TYPE_NTSC,
121 .type = TUNER_PARAM_TYPE_SECAM,
138 .type = TUNER_PARAM_TYPE_PAL,
155 .type = TUNER_PARAM_TYPE_NTSC,
171 .type = TUNER_PARAM_TYPE_PAL,
187 .type = TUNER_PARAM_TYPE_NTSC,
203 .type = TUNER_PARAM_TYPE_NTSC,
214 .type = TUNER_PARAM_TYPE_PAL,
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_hwseq.h | 706 #define HWSEQ_REG_FIELD_LIST(type) \ argument
707 type DCFE_CLOCK_ENABLE; \
708 type DCFEV_CLOCK_ENABLE; \
709 type DC_MEM_GLOBAL_PWR_REQ_DIS; \
710 type BLND_DCP_GRPH_V_UPDATE_LOCK; \
711 type BLND_SCL_V_UPDATE_LOCK; \
712 type BLND_DCP_GRPH_SURF_V_UPDATE_LOCK; \
713 type BLND_BLND_V_UPDATE_LOCK; \
714 type BLND_V_UPDATE_LOCK_MODE; \
715 type BLND_FEEDTHROUGH_EN; \
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| /drivers/media/pci/saa7164/ |
| D | saa7164-cards.c | 52 .type = SAA7164_UNIT_EEPROM,
59 .type = SAA7164_UNIT_TUNER,
66 .type = SAA7164_UNIT_TUNER,
73 .type = SAA7164_UNIT_DIGITAL_DEMODULATOR,
80 .type = SAA7164_UNIT_DIGITAL_DEMODULATOR,
98 .type = SAA7164_UNIT_EEPROM,
105 .type = SAA7164_UNIT_TUNER,
112 .type = SAA7164_UNIT_DIGITAL_DEMODULATOR,
119 .type = SAA7164_UNIT_TUNER,
126 .type = SAA7164_UNIT_DIGITAL_DEMODULATOR,
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