1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Universal Flash Storage Host controller driver
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
6 *
7 * Authors:
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
10 */
11
12 #ifndef _UFSHCD_H
13 #define _UFSHCD_H
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/interrupt.h>
19 #include <linux/io.h>
20 #include <linux/delay.h>
21 #include <linux/slab.h>
22 #include <linux/spinlock.h>
23 #include <linux/rwsem.h>
24 #include <linux/workqueue.h>
25 #include <linux/errno.h>
26 #include <linux/types.h>
27 #include <linux/wait.h>
28 #include <linux/bitops.h>
29 #include <linux/pm_runtime.h>
30 #include <linux/clk.h>
31 #include <linux/completion.h>
32 #include <linux/regulator/consumer.h>
33 #include <linux/bitfield.h>
34 #include <linux/devfreq.h>
35 #include <linux/keyslot-manager.h>
36 #include "unipro.h"
37
38 #include <asm/irq.h>
39 #include <asm/byteorder.h>
40 #include <scsi/scsi.h>
41 #include <scsi/scsi_cmnd.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_tcq.h>
44 #include <scsi/scsi_dbg.h>
45 #include <scsi/scsi_eh.h>
46 #include <linux/android_kabi.h>
47
48 #include "ufs.h"
49 #include "ufs_quirks.h"
50 #include "ufshci.h"
51
52 #define UFSHCD "ufshcd"
53 #define UFSHCD_DRIVER_VERSION "0.2"
54
55 struct ufs_hba;
56
57 enum dev_cmd_type {
58 DEV_CMD_TYPE_NOP = 0x0,
59 DEV_CMD_TYPE_QUERY = 0x1,
60 };
61
62 enum ufs_event_type {
63 /* uic specific errors */
64 UFS_EVT_PA_ERR = 0,
65 UFS_EVT_DL_ERR,
66 UFS_EVT_NL_ERR,
67 UFS_EVT_TL_ERR,
68 UFS_EVT_DME_ERR,
69
70 /* fatal errors */
71 UFS_EVT_AUTO_HIBERN8_ERR,
72 UFS_EVT_FATAL_ERR,
73 UFS_EVT_LINK_STARTUP_FAIL,
74 UFS_EVT_RESUME_ERR,
75 UFS_EVT_SUSPEND_ERR,
76 UFS_EVT_WL_SUSP_ERR,
77 UFS_EVT_WL_RES_ERR,
78
79 /* abnormal events */
80 UFS_EVT_DEV_RESET,
81 UFS_EVT_HOST_RESET,
82 UFS_EVT_ABORT,
83
84 UFS_EVT_CNT,
85 };
86
87 /**
88 * struct uic_command - UIC command structure
89 * @command: UIC command
90 * @argument1: UIC command argument 1
91 * @argument2: UIC command argument 2
92 * @argument3: UIC command argument 3
93 * @cmd_active: Indicate if UIC command is outstanding
94 * @done: UIC command completion
95 */
96 struct uic_command {
97 u32 command;
98 u32 argument1;
99 u32 argument2;
100 u32 argument3;
101 int cmd_active;
102 struct completion done;
103 };
104
105 /* Used to differentiate the power management options */
106 enum ufs_pm_op {
107 UFS_RUNTIME_PM,
108 UFS_SYSTEM_PM,
109 UFS_SHUTDOWN_PM,
110 };
111
112 /* Host <-> Device UniPro Link state */
113 enum uic_link_state {
114 UIC_LINK_OFF_STATE = 0, /* Link powered down or disabled */
115 UIC_LINK_ACTIVE_STATE = 1, /* Link is in Fast/Slow/Sleep state */
116 UIC_LINK_HIBERN8_STATE = 2, /* Link is in Hibernate state */
117 UIC_LINK_BROKEN_STATE = 3, /* Link is in broken state */
118 };
119
120 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
121 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
122 UIC_LINK_ACTIVE_STATE)
123 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
124 UIC_LINK_HIBERN8_STATE)
125 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
126 UIC_LINK_BROKEN_STATE)
127 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
128 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
129 UIC_LINK_ACTIVE_STATE)
130 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
131 UIC_LINK_HIBERN8_STATE)
132 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
133 UIC_LINK_BROKEN_STATE)
134
135 #define ufshcd_set_ufs_dev_active(h) \
136 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
137 #define ufshcd_set_ufs_dev_sleep(h) \
138 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
139 #define ufshcd_set_ufs_dev_poweroff(h) \
140 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
141 #define ufshcd_set_ufs_dev_deepsleep(h) \
142 ((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
143 #define ufshcd_is_ufs_dev_active(h) \
144 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
145 #define ufshcd_is_ufs_dev_sleep(h) \
146 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
147 #define ufshcd_is_ufs_dev_poweroff(h) \
148 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
149 #define ufshcd_is_ufs_dev_deepsleep(h) \
150 ((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
151
152 /*
153 * UFS Power management levels.
154 * Each level is in increasing order of power savings, except DeepSleep
155 * which is lower than PowerDown with power on but not PowerDown with
156 * power off.
157 */
158 enum ufs_pm_level {
159 UFS_PM_LVL_0,
160 UFS_PM_LVL_1,
161 UFS_PM_LVL_2,
162 UFS_PM_LVL_3,
163 UFS_PM_LVL_4,
164 UFS_PM_LVL_5,
165 UFS_PM_LVL_6,
166 UFS_PM_LVL_MAX
167 };
168
169 struct ufs_pm_lvl_states {
170 enum ufs_dev_pwr_mode dev_state;
171 enum uic_link_state link_state;
172 };
173
174 /**
175 * struct ufshcd_lrb - local reference block
176 * @utr_descriptor_ptr: UTRD address of the command
177 * @ucd_req_ptr: UCD address of the command
178 * @ucd_rsp_ptr: Response UPIU address for this command
179 * @ucd_prdt_ptr: PRDT address of the command
180 * @utrd_dma_addr: UTRD dma address for debug
181 * @ucd_prdt_dma_addr: PRDT dma address for debug
182 * @ucd_rsp_dma_addr: UPIU response dma address for debug
183 * @ucd_req_dma_addr: UPIU request dma address for debug
184 * @cmd: pointer to SCSI command
185 * @sense_buffer: pointer to sense buffer address of the SCSI command
186 * @sense_bufflen: Length of the sense buffer
187 * @scsi_status: SCSI status of the command
188 * @command_type: SCSI, UFS, Query.
189 * @task_tag: Task tag of the command
190 * @lun: LUN of the command
191 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
192 * @issue_time_stamp: time stamp for debug purposes
193 * @compl_time_stamp: time stamp for statistics
194 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
195 * @data_unit_num: the data unit number for the first block for inline crypto
196 * @req_abort_skip: skip request abort task flag
197 */
198 struct ufshcd_lrb {
199 struct utp_transfer_req_desc *utr_descriptor_ptr;
200 struct utp_upiu_req *ucd_req_ptr;
201 struct utp_upiu_rsp *ucd_rsp_ptr;
202 struct ufshcd_sg_entry *ucd_prdt_ptr;
203
204 dma_addr_t utrd_dma_addr;
205 dma_addr_t ucd_req_dma_addr;
206 dma_addr_t ucd_rsp_dma_addr;
207 dma_addr_t ucd_prdt_dma_addr;
208
209 struct scsi_cmnd *cmd;
210 u8 *sense_buffer;
211 unsigned int sense_bufflen;
212 int scsi_status;
213
214 int command_type;
215 int task_tag;
216 u8 lun; /* UPIU LUN id field is only 8-bit wide */
217 bool intr_cmd;
218 ktime_t issue_time_stamp;
219 ktime_t compl_time_stamp;
220 #ifdef CONFIG_SCSI_UFS_CRYPTO
221 int crypto_key_slot;
222 u64 data_unit_num;
223 #endif
224
225 bool req_abort_skip;
226
227 ANDROID_KABI_RESERVE(1);
228 };
229
230 /**
231 * struct ufs_query - holds relevant data structures for query request
232 * @request: request upiu and function
233 * @descriptor: buffer for sending/receiving descriptor
234 * @response: response upiu and response
235 */
236 struct ufs_query {
237 struct ufs_query_req request;
238 u8 *descriptor;
239 struct ufs_query_res response;
240 };
241
242 /**
243 * struct ufs_dev_cmd - all assosiated fields with device management commands
244 * @type: device management command type - Query, NOP OUT
245 * @lock: lock to allow one command at a time
246 * @complete: internal commands completion
247 */
248 struct ufs_dev_cmd {
249 enum dev_cmd_type type;
250 struct mutex lock;
251 struct completion *complete;
252 struct ufs_query query;
253 };
254
255 /**
256 * struct ufs_clk_info - UFS clock related info
257 * @list: list headed by hba->clk_list_head
258 * @clk: clock node
259 * @name: clock name
260 * @max_freq: maximum frequency supported by the clock
261 * @min_freq: min frequency that can be used for clock scaling
262 * @curr_freq: indicates the current frequency that it is set to
263 * @keep_link_active: indicates that the clk should not be disabled if
264 link is active
265 * @enabled: variable to check against multiple enable/disable
266 */
267 struct ufs_clk_info {
268 struct list_head list;
269 struct clk *clk;
270 const char *name;
271 u32 max_freq;
272 u32 min_freq;
273 u32 curr_freq;
274 bool keep_link_active;
275 bool enabled;
276 };
277
278 enum ufs_notify_change_status {
279 PRE_CHANGE,
280 POST_CHANGE,
281 };
282
283 struct ufs_pa_layer_attr {
284 u32 gear_rx;
285 u32 gear_tx;
286 u32 lane_rx;
287 u32 lane_tx;
288 u32 pwr_rx;
289 u32 pwr_tx;
290 u32 hs_rate;
291 };
292
293 struct ufs_pwr_mode_info {
294 bool is_valid;
295 struct ufs_pa_layer_attr info;
296 };
297
298 /**
299 * struct ufs_hba_variant_ops - variant specific callbacks
300 * @name: variant name
301 * @init: called when the driver is initialized
302 * @exit: called to cleanup everything done in init
303 * @get_ufs_hci_version: called to get UFS HCI version
304 * @clk_scale_notify: notifies that clks are scaled up/down
305 * @setup_clocks: called before touching any of the controller registers
306 * @hce_enable_notify: called before and after HCE enable bit is set to allow
307 * variant specific Uni-Pro initialization.
308 * @link_startup_notify: called before and after Link startup is carried out
309 * to allow variant specific Uni-Pro initialization.
310 * @pwr_change_notify: called before and after a power mode change
311 * is carried out to allow vendor spesific capabilities
312 * to be set.
313 * @setup_xfer_req: called before any transfer request is issued
314 * to set some things
315 * @setup_task_mgmt: called before any task management request is issued
316 * to set some things
317 * @hibern8_notify: called around hibern8 enter/exit
318 * @apply_dev_quirks: called to apply device specific quirks
319 * @suspend: called during host controller PM callback
320 * @resume: called during host controller PM callback
321 * @dbg_register_dump: used to dump controller debug information
322 * @phy_initialization: used to initialize phys
323 * @device_reset: called to issue a reset pulse on the UFS device
324 * @program_key: program or evict an inline encryption key
325 * @event_notify: called to notify important events
326 */
327 struct ufs_hba_variant_ops {
328 const char *name;
329 int (*init)(struct ufs_hba *);
330 void (*exit)(struct ufs_hba *);
331 u32 (*get_ufs_hci_version)(struct ufs_hba *);
332 int (*clk_scale_notify)(struct ufs_hba *, bool,
333 enum ufs_notify_change_status);
334 int (*setup_clocks)(struct ufs_hba *, bool,
335 enum ufs_notify_change_status);
336 int (*hce_enable_notify)(struct ufs_hba *,
337 enum ufs_notify_change_status);
338 int (*link_startup_notify)(struct ufs_hba *,
339 enum ufs_notify_change_status);
340 int (*pwr_change_notify)(struct ufs_hba *,
341 enum ufs_notify_change_status status,
342 struct ufs_pa_layer_attr *,
343 struct ufs_pa_layer_attr *);
344 void (*setup_xfer_req)(struct ufs_hba *hba, int tag,
345 bool is_scsi_cmd);
346 void (*setup_task_mgmt)(struct ufs_hba *, int, u8);
347 void (*hibern8_notify)(struct ufs_hba *, enum uic_cmd_dme,
348 enum ufs_notify_change_status);
349 int (*apply_dev_quirks)(struct ufs_hba *hba);
350 void (*fixup_dev_quirks)(struct ufs_hba *hba);
351 int (*suspend)(struct ufs_hba *, enum ufs_pm_op,
352 enum ufs_notify_change_status);
353 int (*resume)(struct ufs_hba *, enum ufs_pm_op);
354 void (*dbg_register_dump)(struct ufs_hba *hba);
355 int (*phy_initialization)(struct ufs_hba *);
356 int (*device_reset)(struct ufs_hba *hba);
357 void (*config_scaling_param)(struct ufs_hba *hba,
358 struct devfreq_dev_profile *profile,
359 void *data);
360 int (*program_key)(struct ufs_hba *hba,
361 const union ufs_crypto_cfg_entry *cfg, int slot);
362 void (*event_notify)(struct ufs_hba *hba,
363 enum ufs_event_type evt, void *data);
364
365 ANDROID_KABI_RESERVE(1);
366 ANDROID_KABI_RESERVE(2);
367 ANDROID_KABI_RESERVE(3);
368 ANDROID_KABI_RESERVE(4);
369 };
370
371 /* clock gating state */
372 enum clk_gating_state {
373 CLKS_OFF,
374 CLKS_ON,
375 REQ_CLKS_OFF,
376 REQ_CLKS_ON,
377 };
378
379 /**
380 * struct ufs_clk_gating - UFS clock gating related info
381 * @gate_work: worker to turn off clocks after some delay as specified in
382 * delay_ms
383 * @ungate_work: worker to turn on clocks that will be used in case of
384 * interrupt context
385 * @state: the current clocks state
386 * @delay_ms: gating delay in ms
387 * @is_suspended: clk gating is suspended when set to 1 which can be used
388 * during suspend/resume
389 * @delay_attr: sysfs attribute to control delay_attr
390 * @enable_attr: sysfs attribute to enable/disable clock gating
391 * @is_enabled: Indicates the current status of clock gating
392 * @is_initialized: Indicates whether clock gating is initialized or not
393 * @active_reqs: number of requests that are pending and should be waited for
394 * completion before gating clocks.
395 */
396 struct ufs_clk_gating {
397 struct delayed_work gate_work;
398 struct work_struct ungate_work;
399 enum clk_gating_state state;
400 unsigned long delay_ms;
401 bool is_suspended;
402 struct device_attribute delay_attr;
403 struct device_attribute enable_attr;
404 bool is_enabled;
405 bool is_initialized;
406 int active_reqs;
407 struct workqueue_struct *clk_gating_workq;
408
409 ANDROID_KABI_RESERVE(1);
410 };
411
412 struct ufs_saved_pwr_info {
413 struct ufs_pa_layer_attr info;
414 bool is_valid;
415 };
416
417 /**
418 * struct ufs_clk_scaling - UFS clock scaling related data
419 * @active_reqs: number of requests that are pending. If this is zero when
420 * devfreq ->target() function is called then schedule "suspend_work" to
421 * suspend devfreq.
422 * @tot_busy_t: Total busy time in current polling window
423 * @window_start_t: Start time (in jiffies) of the current polling window
424 * @busy_start_t: Start time of current busy period
425 * @enable_attr: sysfs attribute to enable/disable clock scaling
426 * @saved_pwr_info: UFS power mode may also be changed during scaling and this
427 * one keeps track of previous power mode.
428 * @workq: workqueue to schedule devfreq suspend/resume work
429 * @suspend_work: worker to suspend devfreq
430 * @resume_work: worker to resume devfreq
431 * @min_gear: lowest HS gear to scale down to
432 * @is_enabled: tracks if scaling is currently enabled or not, controlled by
433 clkscale_enable sysfs node
434 * @is_allowed: tracks if scaling is currently allowed or not, used to block
435 clock scaling which is not invoked from devfreq governor
436 * @is_initialized: Indicates whether clock scaling is initialized or not
437 * @is_busy_started: tracks if busy period has started or not
438 * @is_suspended: tracks if devfreq is suspended or not
439 */
440 struct ufs_clk_scaling {
441 int active_reqs;
442 unsigned long tot_busy_t;
443 ktime_t window_start_t;
444 ktime_t busy_start_t;
445 struct device_attribute enable_attr;
446 struct ufs_saved_pwr_info saved_pwr_info;
447 struct workqueue_struct *workq;
448 struct work_struct suspend_work;
449 struct work_struct resume_work;
450 u32 min_gear;
451 bool is_enabled;
452 bool is_allowed;
453 bool is_initialized;
454 bool is_busy_started;
455 bool is_suspended;
456
457 ANDROID_KABI_RESERVE(1);
458 };
459
460 #define UFS_EVENT_HIST_LENGTH 8
461 /**
462 * struct ufs_event_hist - keeps history of errors
463 * @pos: index to indicate cyclic buffer position
464 * @reg: cyclic buffer for registers value
465 * @tstamp: cyclic buffer for time stamp
466 * @cnt: error counter
467 */
468 struct ufs_event_hist {
469 int pos;
470 u32 val[UFS_EVENT_HIST_LENGTH];
471 ktime_t tstamp[UFS_EVENT_HIST_LENGTH];
472 unsigned long long cnt;
473 };
474
475 /**
476 * struct ufs_stats - keeps usage/err statistics
477 * @last_intr_status: record the last interrupt status.
478 * @last_intr_ts: record the last interrupt timestamp.
479 * @hibern8_exit_cnt: Counter to keep track of number of exits,
480 * reset this after link-startup.
481 * @last_hibern8_exit_tstamp: Set time after the hibern8 exit.
482 * Clear after the first successful command completion.
483 */
484 struct ufs_stats {
485 u32 last_intr_status;
486 ktime_t last_intr_ts;
487
488 u32 hibern8_exit_cnt;
489 ktime_t last_hibern8_exit_tstamp;
490 struct ufs_event_hist event[UFS_EVT_CNT];
491 };
492
493 /**
494 * enum ufshcd_state - UFS host controller state
495 * @UFSHCD_STATE_RESET: Link is not operational. Postpone SCSI command
496 * processing.
497 * @UFSHCD_STATE_OPERATIONAL: The host controller is operational and can process
498 * SCSI commands.
499 * @UFSHCD_STATE_EH_SCHEDULED_NON_FATAL: The error handler has been scheduled.
500 * SCSI commands may be submitted to the controller.
501 * @UFSHCD_STATE_EH_SCHEDULED_FATAL: The error handler has been scheduled. Fail
502 * newly submitted SCSI commands with error code DID_BAD_TARGET.
503 * @UFSHCD_STATE_ERROR: An unrecoverable error occurred, e.g. link recovery
504 * failed. Fail all SCSI commands with error code DID_ERROR.
505 */
506 enum ufshcd_state {
507 UFSHCD_STATE_RESET,
508 UFSHCD_STATE_OPERATIONAL,
509 UFSHCD_STATE_EH_SCHEDULED_NON_FATAL,
510 UFSHCD_STATE_EH_SCHEDULED_FATAL,
511 UFSHCD_STATE_ERROR,
512 };
513
514 enum ufshcd_quirks {
515 /* Interrupt aggregation support is broken */
516 UFSHCD_QUIRK_BROKEN_INTR_AGGR = 1 << 0,
517
518 /*
519 * delay before each dme command is required as the unipro
520 * layer has shown instabilities
521 */
522 UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS = 1 << 1,
523
524 /*
525 * If UFS host controller is having issue in processing LCC (Line
526 * Control Command) coming from device then enable this quirk.
527 * When this quirk is enabled, host controller driver should disable
528 * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
529 * attribute of device to 0).
530 */
531 UFSHCD_QUIRK_BROKEN_LCC = 1 << 2,
532
533 /*
534 * The attribute PA_RXHSUNTERMCAP specifies whether or not the
535 * inbound Link supports unterminated line in HS mode. Setting this
536 * attribute to 1 fixes moving to HS gear.
537 */
538 UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP = 1 << 3,
539
540 /*
541 * This quirk needs to be enabled if the host controller only allows
542 * accessing the peer dme attributes in AUTO mode (FAST AUTO or
543 * SLOW AUTO).
544 */
545 UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE = 1 << 4,
546
547 /*
548 * This quirk needs to be enabled if the host controller doesn't
549 * advertise the correct version in UFS_VER register. If this quirk
550 * is enabled, standard UFS host driver will call the vendor specific
551 * ops (get_ufs_hci_version) to get the correct version.
552 */
553 UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION = 1 << 5,
554
555 /*
556 * Clear handling for transfer/task request list is just opposite.
557 */
558 UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR = 1 << 6,
559
560 /*
561 * This quirk needs to be enabled if host controller doesn't allow
562 * that the interrupt aggregation timer and counter are reset by s/w.
563 */
564 UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR = 1 << 7,
565
566 /*
567 * This quirks needs to be enabled if host controller cannot be
568 * enabled via HCE register.
569 */
570 UFSHCI_QUIRK_BROKEN_HCE = 1 << 8,
571
572 /*
573 * This quirk needs to be enabled if the host controller regards
574 * resolution of the values of PRDTO and PRDTL in UTRD as byte.
575 */
576 UFSHCD_QUIRK_PRDT_BYTE_GRAN = 1 << 9,
577
578 /*
579 * This quirk needs to be enabled if the host controller reports
580 * OCS FATAL ERROR with device error through sense data
581 */
582 UFSHCD_QUIRK_BROKEN_OCS_FATAL_ERROR = 1 << 10,
583
584 /*
585 * This quirk needs to be enabled if the host controller has
586 * auto-hibernate capability but it doesn't work.
587 */
588 UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8 = 1 << 11,
589
590 /*
591 * This quirk needs to disable manual flush for write booster
592 */
593 UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL = 1 << 12,
594
595 /*
596 * This quirk needs to disable unipro timeout values
597 * before power mode change
598 */
599 UFSHCD_QUIRK_SKIP_DEF_UNIPRO_TIMEOUT_SETTING = 1 << 13,
600
601 /*
602 * This quirk allows only sg entries aligned with page size.
603 */
604 UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE = 1 << 14,
605
606 /*
607 * This quirk needs to be enabled if the host controller does not
608 * support UIC command
609 */
610 UFSHCD_QUIRK_BROKEN_UIC_CMD = 1 << 15,
611
612 /*
613 * This quirk needs to be enabled if the host controller cannot
614 * support physical host configuration.
615 */
616 UFSHCD_QUIRK_SKIP_PH_CONFIGURATION = 1 << 16,
617
618 /*
619 * This quirk needs to be enabled if the host controller supports inline
620 * encryption, but it needs to initialize the crypto capabilities in a
621 * nonstandard way and/or it needs to override blk_ksm_ll_ops. If
622 * enabled, the standard code won't initialize the blk_keyslot_manager;
623 * ufs_hba_variant_ops::init() must do it instead.
624 */
625 UFSHCD_QUIRK_CUSTOM_KEYSLOT_MANAGER = 1 << 20,
626
627 /*
628 * This quirk needs to be enabled if the host controller supports inline
629 * encryption, but the CRYPTO_GENERAL_ENABLE bit is not implemented and
630 * breaks the HCE sequence if used.
631 */
632 UFSHCD_QUIRK_BROKEN_CRYPTO_ENABLE = 1 << 21,
633
634 /*
635 * This quirk needs to be enabled if the host controller requires that
636 * the PRDT be cleared after each encrypted request because encryption
637 * keys were stored in it.
638 */
639 UFSHCD_QUIRK_KEYS_IN_PRDT = 1 << 22,
640 };
641
642 enum ufshcd_caps {
643 /* Allow dynamic clk gating */
644 UFSHCD_CAP_CLK_GATING = 1 << 0,
645
646 /* Allow hiberb8 with clk gating */
647 UFSHCD_CAP_HIBERN8_WITH_CLK_GATING = 1 << 1,
648
649 /* Allow dynamic clk scaling */
650 UFSHCD_CAP_CLK_SCALING = 1 << 2,
651
652 /* Allow auto bkops to enabled during runtime suspend */
653 UFSHCD_CAP_AUTO_BKOPS_SUSPEND = 1 << 3,
654
655 /*
656 * This capability allows host controller driver to use the UFS HCI's
657 * interrupt aggregation capability.
658 * CAUTION: Enabling this might reduce overall UFS throughput.
659 */
660 UFSHCD_CAP_INTR_AGGR = 1 << 4,
661
662 /*
663 * This capability allows the device auto-bkops to be always enabled
664 * except during suspend (both runtime and suspend).
665 * Enabling this capability means that device will always be allowed
666 * to do background operation when it's active but it might degrade
667 * the performance of ongoing read/write operations.
668 */
669 UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND = 1 << 5,
670
671 /*
672 * This capability allows host controller driver to automatically
673 * enable runtime power management by itself instead of waiting
674 * for userspace to control the power management.
675 */
676 UFSHCD_CAP_RPM_AUTOSUSPEND = 1 << 6,
677
678 /*
679 * This capability allows the host controller driver to turn-on
680 * WriteBooster, if the underlying device supports it and is
681 * provisioned to be used. This would increase the write performance.
682 */
683 UFSHCD_CAP_WB_EN = 1 << 7,
684
685 /*
686 * This capability allows the host controller driver to use the
687 * inline crypto engine, if it is present
688 */
689 UFSHCD_CAP_CRYPTO = 1 << 8,
690
691 /*
692 * This capability allows the controller regulators to be put into
693 * lpm mode aggressively during clock gating.
694 * This would increase power savings.
695 */
696 UFSHCD_CAP_AGGR_POWER_COLLAPSE = 1 << 9,
697
698 /*
699 * This capability allows the host controller driver to use DeepSleep,
700 * if it is supported by the UFS device. The host controller driver must
701 * support device hardware reset via the hba->device_reset() callback,
702 * in order to exit DeepSleep state.
703 */
704 UFSHCD_CAP_DEEPSLEEP = 1 << 10,
705
706 /*
707 * This capability allows the host controller driver to use temperature
708 * notification if it is supported by the UFS device.
709 */
710 UFSHCD_CAP_TEMP_NOTIF = 1 << 11,
711 };
712
713 struct ufs_hba_variant_params {
714 struct devfreq_dev_profile devfreq_profile;
715 struct devfreq_simple_ondemand_data ondemand_data;
716 u16 hba_enable_delay_us;
717 u32 wb_flush_threshold;
718 };
719
720 #ifdef CONFIG_SCSI_UFS_HPB
721 /**
722 * struct ufshpb_dev_info - UFSHPB device related info
723 * @num_lu: the number of user logical unit to check whether all lu finished
724 * initialization
725 * @rgn_size: device reported HPB region size
726 * @srgn_size: device reported HPB sub-region size
727 * @slave_conf_cnt: counter to check all lu finished initialization
728 * @hpb_disabled: flag to check if HPB is disabled
729 * @max_hpb_single_cmd: device reported bMAX_DATA_SIZE_FOR_SINGLE_CMD value
730 * @is_legacy: flag to check HPB 1.0
731 * @control_mode: either host or device
732 */
733 struct ufshpb_dev_info {
734 int num_lu;
735 int rgn_size;
736 int srgn_size;
737 atomic_t slave_conf_cnt;
738 bool hpb_disabled;
739 u8 max_hpb_single_cmd;
740 bool is_legacy;
741 u8 control_mode;
742 };
743 #endif
744
745 struct ufs_hba_monitor {
746 unsigned long chunk_size;
747
748 unsigned long nr_sec_rw[2];
749 ktime_t total_busy[2];
750
751 unsigned long nr_req[2];
752 /* latencies*/
753 ktime_t lat_sum[2];
754 ktime_t lat_max[2];
755 ktime_t lat_min[2];
756
757 u32 nr_queued[2];
758 ktime_t busy_start_ts[2];
759
760 ktime_t enabled_ts;
761 bool enabled;
762 };
763
764 /**
765 * struct ufs_hba - per adapter private structure
766 * @mmio_base: UFSHCI base register address
767 * @ucdl_base_addr: UFS Command Descriptor base address
768 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
769 * @utmrdl_base_addr: UTP Task Management Descriptor base address
770 * @ucdl_dma_addr: UFS Command Descriptor DMA address
771 * @utrdl_dma_addr: UTRDL DMA address
772 * @utmrdl_dma_addr: UTMRDL DMA address
773 * @host: Scsi_Host instance of the driver
774 * @dev: device handle
775 * @lrb: local reference block
776 * @outstanding_tasks: Bits representing outstanding task requests
777 * @outstanding_lock: Protects @outstanding_reqs.
778 * @outstanding_reqs: Bits representing outstanding transfer requests
779 * @capabilities: UFS Controller Capabilities
780 * @nutrs: Transfer Request Queue depth supported by controller
781 * @nutmrs: Task Management Queue depth supported by controller
782 * @reserved_slot: Used to submit device commands. Protected by @dev_cmd.lock.
783 * @ufs_version: UFS Version to which controller complies
784 * @vops: pointer to variant specific operations
785 * @priv: pointer to variant specific private data
786 * @sg_entry_size: size of struct ufshcd_sg_entry (may include variant fields)
787 * @irq: Irq number of the controller
788 * @active_uic_cmd: handle of active UIC command
789 * @uic_cmd_mutex: mutex for UIC command
790 * @tmf_tag_set: TMF tag set.
791 * @tmf_queue: Used to allocate TMF tags.
792 * @pwr_done: completion for power mode change
793 * @ufshcd_state: UFSHCD state
794 * @eh_flags: Error handling flags
795 * @intr_mask: Interrupt Mask Bits
796 * @ee_ctrl_mask: Exception event control mask
797 * @is_powered: flag to check if HBA is powered
798 * @shutting_down: flag to check if shutdown has been invoked
799 * @host_sem: semaphore used to serialize concurrent contexts
800 * @eh_wq: Workqueue that eh_work works on
801 * @eh_work: Worker to handle UFS errors that require s/w attention
802 * @eeh_work: Worker to handle exception events
803 * @errors: HBA errors
804 * @uic_error: UFS interconnect layer error status
805 * @saved_err: sticky error mask
806 * @saved_uic_err: sticky UIC error mask
807 * @force_reset: flag to force eh_work perform a full reset
808 * @force_pmc: flag to force a power mode change
809 * @silence_err_logs: flag to silence error logs
810 * @dev_cmd: ufs device management command information
811 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
812 * @auto_bkops_enabled: to track whether bkops is enabled in device
813 * @vreg_info: UFS device voltage regulator information
814 * @clk_list_head: UFS host controller clocks list node head
815 * @pwr_info: holds current power mode
816 * @max_pwr_info: keeps the device max valid pwm
817 * @clk_scaling_lock: used to serialize device commands and clock scaling
818 * @desc_size: descriptor sizes reported by device
819 * @urgent_bkops_lvl: keeps track of urgent bkops level for device
820 * @is_urgent_bkops_lvl_checked: keeps track if the urgent bkops level for
821 * device is known or not.
822 * @scsi_block_reqs_cnt: reference counting for scsi block requests
823 * @crypto_capabilities: Content of crypto capabilities register (0x100)
824 * @crypto_cap_array: Array of crypto capabilities
825 * @crypto_cfg_register: Start of the crypto cfg array
826 * @ksm: the keyslot manager tied to this hba
827 */
828 struct ufs_hba {
829 void __iomem *mmio_base;
830
831 /* Virtual memory reference */
832 struct utp_transfer_cmd_desc *ucdl_base_addr;
833 struct utp_transfer_req_desc *utrdl_base_addr;
834 struct utp_task_req_desc *utmrdl_base_addr;
835
836 /* DMA memory reference */
837 dma_addr_t ucdl_dma_addr;
838 dma_addr_t utrdl_dma_addr;
839 dma_addr_t utmrdl_dma_addr;
840
841 struct Scsi_Host *host;
842 struct device *dev;
843 /*
844 * This field is to keep a reference to "scsi_device" corresponding to
845 * "UFS device" W-LU.
846 */
847 struct scsi_device *sdev_ufs_device;
848
849 #ifdef CONFIG_SCSI_UFS_HWMON
850 struct device *hwmon_device;
851 #endif
852
853 enum ufs_dev_pwr_mode curr_dev_pwr_mode;
854 enum uic_link_state uic_link_state;
855 /* Desired UFS power management level during runtime PM */
856 enum ufs_pm_level rpm_lvl;
857 /* Desired UFS power management level during system PM */
858 enum ufs_pm_level spm_lvl;
859 struct device_attribute rpm_lvl_attr;
860 struct device_attribute spm_lvl_attr;
861 int pm_op_in_progress;
862
863 /* Auto-Hibernate Idle Timer register value */
864 u32 ahit;
865
866 struct ufshcd_lrb *lrb;
867
868 unsigned long outstanding_tasks;
869 spinlock_t outstanding_lock;
870 unsigned long outstanding_reqs;
871
872 u32 capabilities;
873 int nutrs;
874 int nutmrs;
875 u32 reserved_slot;
876 u32 ufs_version;
877 const struct ufs_hba_variant_ops *vops;
878 struct ufs_hba_variant_params *vps;
879 void *priv;
880 size_t sg_entry_size;
881 unsigned int irq;
882 bool is_irq_enabled;
883 enum ufs_ref_clk_freq dev_ref_clk_freq;
884
885 unsigned int quirks; /* Deviations from standard UFSHCI spec. */
886
887 /* Device deviations from standard UFS device spec. */
888 unsigned int dev_quirks;
889
890 struct blk_mq_tag_set tmf_tag_set;
891 struct request_queue *tmf_queue;
892 struct request **tmf_rqs;
893
894 struct uic_command *active_uic_cmd;
895 struct mutex uic_cmd_mutex;
896 struct completion *uic_async_done;
897
898 enum ufshcd_state ufshcd_state;
899 u32 eh_flags;
900 u32 intr_mask;
901 u16 ee_ctrl_mask; /* Exception event mask */
902 u16 ee_drv_mask; /* Exception event mask for driver */
903 u16 ee_usr_mask; /* Exception event mask for user (via debugfs) */
904 struct mutex ee_ctrl_mutex;
905 bool is_powered;
906 bool shutting_down;
907 struct semaphore host_sem;
908
909 /* Work Queues */
910 struct workqueue_struct *eh_wq;
911 struct work_struct eh_work;
912 struct work_struct eeh_work;
913
914 /* HBA Errors */
915 u32 errors;
916 u32 uic_error;
917 u32 saved_err;
918 u32 saved_uic_err;
919 struct ufs_stats ufs_stats;
920 bool force_reset;
921 bool force_pmc;
922 bool silence_err_logs;
923
924 /* Device management request data */
925 struct ufs_dev_cmd dev_cmd;
926 ktime_t last_dme_cmd_tstamp;
927 int nop_out_timeout;
928
929 /* Keeps information of the UFS device connected to this host */
930 struct ufs_dev_info dev_info;
931 bool auto_bkops_enabled;
932 struct ufs_vreg_info vreg_info;
933 struct list_head clk_list_head;
934
935 /* Number of requests aborts */
936 int req_abort_count;
937
938 /* Number of lanes available (1 or 2) for Rx/Tx */
939 u32 lanes_per_direction;
940 struct ufs_pa_layer_attr pwr_info;
941 struct ufs_pwr_mode_info max_pwr_info;
942
943 struct ufs_clk_gating clk_gating;
944 /* Control to enable/disable host capabilities */
945 u32 caps;
946
947 struct devfreq *devfreq;
948 struct ufs_clk_scaling clk_scaling;
949 bool is_sys_suspended;
950
951 enum bkops_status urgent_bkops_lvl;
952 bool is_urgent_bkops_lvl_checked;
953
954 struct rw_semaphore clk_scaling_lock;
955 unsigned char desc_size[QUERY_DESC_IDN_MAX];
956 atomic_t scsi_block_reqs_cnt;
957
958 struct device bsg_dev;
959 struct request_queue *bsg_queue;
960 struct delayed_work rpm_dev_flush_recheck_work;
961
962 #ifdef CONFIG_SCSI_UFS_HPB
963 struct ufshpb_dev_info ufshpb_dev;
964 #endif
965
966 struct ufs_hba_monitor monitor;
967
968 #ifdef CONFIG_SCSI_UFS_CRYPTO
969 union ufs_crypto_capabilities crypto_capabilities;
970 union ufs_crypto_cap_entry *crypto_cap_array;
971 u32 crypto_cfg_register;
972 struct blk_keyslot_manager ksm;
973 #endif
974 #ifdef CONFIG_DEBUG_FS
975 struct dentry *debugfs_root;
976 struct delayed_work debugfs_ee_work;
977 u32 debugfs_ee_rate_limit_ms;
978 #endif
979 u32 luns_avail;
980 bool complete_put;
981
982 ANDROID_KABI_RESERVE(1);
983 ANDROID_KABI_RESERVE(2);
984 ANDROID_KABI_RESERVE(3);
985 ANDROID_KABI_RESERVE(4);
986 };
987
988 /* Returns true if clocks can be gated. Otherwise false */
ufshcd_is_clkgating_allowed(struct ufs_hba * hba)989 static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
990 {
991 return hba->caps & UFSHCD_CAP_CLK_GATING;
992 }
ufshcd_can_hibern8_during_gating(struct ufs_hba * hba)993 static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
994 {
995 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
996 }
ufshcd_is_clkscaling_supported(struct ufs_hba * hba)997 static inline int ufshcd_is_clkscaling_supported(struct ufs_hba *hba)
998 {
999 return hba->caps & UFSHCD_CAP_CLK_SCALING;
1000 }
ufshcd_can_autobkops_during_suspend(struct ufs_hba * hba)1001 static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
1002 {
1003 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
1004 }
ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba * hba)1005 static inline bool ufshcd_is_rpm_autosuspend_allowed(struct ufs_hba *hba)
1006 {
1007 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND;
1008 }
1009
ufshcd_is_intr_aggr_allowed(struct ufs_hba * hba)1010 static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
1011 {
1012 return (hba->caps & UFSHCD_CAP_INTR_AGGR) &&
1013 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR);
1014 }
1015
ufshcd_can_aggressive_pc(struct ufs_hba * hba)1016 static inline bool ufshcd_can_aggressive_pc(struct ufs_hba *hba)
1017 {
1018 return !!(ufshcd_is_link_hibern8(hba) &&
1019 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE));
1020 }
1021
ufshcd_is_auto_hibern8_supported(struct ufs_hba * hba)1022 static inline bool ufshcd_is_auto_hibern8_supported(struct ufs_hba *hba)
1023 {
1024 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) &&
1025 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8);
1026 }
1027
ufshcd_is_auto_hibern8_enabled(struct ufs_hba * hba)1028 static inline bool ufshcd_is_auto_hibern8_enabled(struct ufs_hba *hba)
1029 {
1030 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit) ? true : false;
1031 }
1032
ufshcd_is_wb_allowed(struct ufs_hba * hba)1033 static inline bool ufshcd_is_wb_allowed(struct ufs_hba *hba)
1034 {
1035 return hba->caps & UFSHCD_CAP_WB_EN;
1036 }
1037
ufshcd_is_user_access_allowed(struct ufs_hba * hba)1038 static inline bool ufshcd_is_user_access_allowed(struct ufs_hba *hba)
1039 {
1040 return !hba->shutting_down;
1041 }
1042
1043 #define ufshcd_writel(hba, val, reg) \
1044 writel((val), (hba)->mmio_base + (reg))
1045 #define ufshcd_readl(hba, reg) \
1046 readl((hba)->mmio_base + (reg))
1047
1048 /**
1049 * ufshcd_rmwl - read modify write into a register
1050 * @hba - per adapter instance
1051 * @mask - mask to apply on read value
1052 * @val - actual value to write
1053 * @reg - register address
1054 */
ufshcd_rmwl(struct ufs_hba * hba,u32 mask,u32 val,u32 reg)1055 static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
1056 {
1057 u32 tmp;
1058
1059 tmp = ufshcd_readl(hba, reg);
1060 tmp &= ~mask;
1061 tmp |= (val & mask);
1062 ufshcd_writel(hba, tmp, reg);
1063 }
1064
1065 int ufshcd_alloc_host(struct device *, struct ufs_hba **);
1066 void ufshcd_dealloc_host(struct ufs_hba *);
1067 int ufshcd_hba_enable(struct ufs_hba *hba);
1068 int ufshcd_init(struct ufs_hba *, void __iomem *, unsigned int);
1069 int ufshcd_link_recovery(struct ufs_hba *hba);
1070 int ufshcd_make_hba_operational(struct ufs_hba *hba);
1071 void ufshcd_remove(struct ufs_hba *);
1072 int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
1073 int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
1074 void ufshcd_delay_us(unsigned long us, unsigned long tolerance);
1075 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
1076 u32 val, unsigned long interval_us,
1077 unsigned long timeout_ms);
1078 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk);
1079 void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val);
1080 void ufshcd_hba_stop(struct ufs_hba *hba);
1081 void ufshcd_schedule_eh_work(struct ufs_hba *hba);
1082
check_upiu_size(void)1083 static inline void check_upiu_size(void)
1084 {
1085 BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
1086 GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
1087 }
1088
1089 /**
1090 * ufshcd_set_variant - set variant specific data to the hba
1091 * @hba - per adapter instance
1092 * @variant - pointer to variant specific data
1093 */
ufshcd_set_variant(struct ufs_hba * hba,void * variant)1094 static inline void ufshcd_set_variant(struct ufs_hba *hba, void *variant)
1095 {
1096 BUG_ON(!hba);
1097 hba->priv = variant;
1098 }
1099
1100 /**
1101 * ufshcd_get_variant - get variant specific data from the hba
1102 * @hba - per adapter instance
1103 */
ufshcd_get_variant(struct ufs_hba * hba)1104 static inline void *ufshcd_get_variant(struct ufs_hba *hba)
1105 {
1106 BUG_ON(!hba);
1107 return hba->priv;
1108 }
ufshcd_keep_autobkops_enabled_except_suspend(struct ufs_hba * hba)1109 static inline bool ufshcd_keep_autobkops_enabled_except_suspend(
1110 struct ufs_hba *hba)
1111 {
1112 return hba->caps & UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND;
1113 }
1114
ufshcd_wb_get_query_index(struct ufs_hba * hba)1115 static inline u8 ufshcd_wb_get_query_index(struct ufs_hba *hba)
1116 {
1117 if (hba->dev_info.wb_buffer_type == WB_BUF_MODE_LU_DEDICATED)
1118 return hba->dev_info.wb_dedicated_lu;
1119 return 0;
1120 }
1121
1122 #ifdef CONFIG_SCSI_UFS_HWMON
1123 void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask);
1124 void ufs_hwmon_remove(struct ufs_hba *hba);
1125 void ufs_hwmon_notify_event(struct ufs_hba *hba, u8 ee_mask);
1126 #else
ufs_hwmon_probe(struct ufs_hba * hba,u8 mask)1127 static inline void ufs_hwmon_probe(struct ufs_hba *hba, u8 mask) {}
ufs_hwmon_remove(struct ufs_hba * hba)1128 static inline void ufs_hwmon_remove(struct ufs_hba *hba) {}
ufs_hwmon_notify_event(struct ufs_hba * hba,u8 ee_mask)1129 static inline void ufs_hwmon_notify_event(struct ufs_hba *hba, u8 ee_mask) {}
1130 #endif
1131
1132 #ifdef CONFIG_PM
1133 extern int ufshcd_runtime_suspend(struct device *dev);
1134 extern int ufshcd_runtime_resume(struct device *dev);
1135 #endif
1136 #ifdef CONFIG_PM_SLEEP
1137 extern int ufshcd_system_suspend(struct device *dev);
1138 extern int ufshcd_system_resume(struct device *dev);
1139 #endif
1140 extern int ufshcd_shutdown(struct ufs_hba *hba);
1141 extern int ufshcd_dme_configure_adapt(struct ufs_hba *hba,
1142 int agreed_gear,
1143 int adapt_val);
1144 extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
1145 u8 attr_set, u32 mib_val, u8 peer);
1146 extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
1147 u32 *mib_val, u8 peer);
1148 extern int ufshcd_config_pwr_mode(struct ufs_hba *hba,
1149 struct ufs_pa_layer_attr *desired_pwr_mode);
1150
1151 /* UIC command interfaces for DME primitives */
1152 #define DME_LOCAL 0
1153 #define DME_PEER 1
1154 #define ATTR_SET_NOR 0 /* NORMAL */
1155 #define ATTR_SET_ST 1 /* STATIC */
1156
ufshcd_dme_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1157 static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
1158 u32 mib_val)
1159 {
1160 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1161 mib_val, DME_LOCAL);
1162 }
1163
ufshcd_dme_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1164 static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
1165 u32 mib_val)
1166 {
1167 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1168 mib_val, DME_LOCAL);
1169 }
1170
ufshcd_dme_peer_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1171 static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
1172 u32 mib_val)
1173 {
1174 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
1175 mib_val, DME_PEER);
1176 }
1177
ufshcd_dme_peer_st_set(struct ufs_hba * hba,u32 attr_sel,u32 mib_val)1178 static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
1179 u32 mib_val)
1180 {
1181 return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
1182 mib_val, DME_PEER);
1183 }
1184
ufshcd_dme_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1185 static inline int ufshcd_dme_get(struct ufs_hba *hba,
1186 u32 attr_sel, u32 *mib_val)
1187 {
1188 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
1189 }
1190
ufshcd_dme_peer_get(struct ufs_hba * hba,u32 attr_sel,u32 * mib_val)1191 static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
1192 u32 attr_sel, u32 *mib_val)
1193 {
1194 return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
1195 }
1196
ufshcd_is_hs_mode(struct ufs_pa_layer_attr * pwr_info)1197 static inline bool ufshcd_is_hs_mode(struct ufs_pa_layer_attr *pwr_info)
1198 {
1199 return (pwr_info->pwr_rx == FAST_MODE ||
1200 pwr_info->pwr_rx == FASTAUTO_MODE) &&
1201 (pwr_info->pwr_tx == FAST_MODE ||
1202 pwr_info->pwr_tx == FASTAUTO_MODE);
1203 }
1204
ufshcd_disable_host_tx_lcc(struct ufs_hba * hba)1205 static inline int ufshcd_disable_host_tx_lcc(struct ufs_hba *hba)
1206 {
1207 return ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0);
1208 }
1209
1210 /* Expose Query-Request API */
1211 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
1212 enum query_opcode opcode,
1213 enum desc_idn idn, u8 index,
1214 u8 selector,
1215 u8 *desc_buf, int *buf_len);
1216 int ufshcd_read_desc_param(struct ufs_hba *hba,
1217 enum desc_idn desc_id,
1218 int desc_index,
1219 u8 param_offset,
1220 u8 *param_read_buf,
1221 u8 param_size);
1222 int ufshcd_query_attr_retry(struct ufs_hba *hba, enum query_opcode opcode,
1223 enum attr_idn idn, u8 index, u8 selector,
1224 u32 *attr_val);
1225 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
1226 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val);
1227 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
1228 enum flag_idn idn, u8 index, bool *flag_res);
1229 int ufshcd_query_flag_retry(struct ufs_hba *hba,
1230 enum query_opcode opcode, enum flag_idn idn, u8 index, bool *flag_res);
1231 int ufshcd_bkops_ctrl(struct ufs_hba *hba, enum bkops_status status);
1232
1233 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba);
1234 void ufshcd_auto_hibern8_update(struct ufs_hba *hba, u32 ahit);
1235 void ufshcd_fixup_dev_quirks(struct ufs_hba *hba, struct ufs_dev_fix *fixups);
1236 #define SD_ASCII_STD true
1237 #define SD_RAW false
1238 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
1239 u8 **buf, bool ascii);
1240
1241 int ufshcd_hold(struct ufs_hba *hba, bool async);
1242 void ufshcd_release(struct ufs_hba *hba);
1243
1244 int ufshcd_freeze_scsi_devs(struct ufs_hba *hba, u64 timeout_us);
1245 void ufshcd_unfreeze_scsi_devs(struct ufs_hba *hba);
1246
1247 void ufshcd_map_desc_id_to_length(struct ufs_hba *hba, enum desc_idn desc_id,
1248 int *desc_length);
1249
1250 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba);
1251
1252 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd);
1253
1254 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
1255 struct utp_upiu_req *req_upiu,
1256 struct utp_upiu_req *rsp_upiu,
1257 int msgcode,
1258 u8 *desc_buff, int *buff_len,
1259 enum query_opcode desc_op);
1260
1261 int ufshcd_wb_toggle(struct ufs_hba *hba, bool enable);
1262 int ufshcd_suspend_prepare(struct device *dev);
1263 int __ufshcd_suspend_prepare(struct device *dev, bool rpm_ok_for_spm);
1264 void ufshcd_resume_complete(struct device *dev);
1265
1266 /* Wrapper functions for safely calling variant operations */
ufshcd_get_var_name(struct ufs_hba * hba)1267 static inline const char *ufshcd_get_var_name(struct ufs_hba *hba)
1268 {
1269 if (hba->vops)
1270 return hba->vops->name;
1271 return "";
1272 }
1273
ufshcd_vops_init(struct ufs_hba * hba)1274 static inline int ufshcd_vops_init(struct ufs_hba *hba)
1275 {
1276 if (hba->vops && hba->vops->init)
1277 return hba->vops->init(hba);
1278
1279 return 0;
1280 }
1281
ufshcd_vops_exit(struct ufs_hba * hba)1282 static inline void ufshcd_vops_exit(struct ufs_hba *hba)
1283 {
1284 if (hba->vops && hba->vops->exit)
1285 return hba->vops->exit(hba);
1286 }
1287
ufshcd_vops_get_ufs_hci_version(struct ufs_hba * hba)1288 static inline u32 ufshcd_vops_get_ufs_hci_version(struct ufs_hba *hba)
1289 {
1290 if (hba->vops && hba->vops->get_ufs_hci_version)
1291 return hba->vops->get_ufs_hci_version(hba);
1292
1293 return ufshcd_readl(hba, REG_UFS_VERSION);
1294 }
1295
ufshcd_vops_clk_scale_notify(struct ufs_hba * hba,bool up,enum ufs_notify_change_status status)1296 static inline int ufshcd_vops_clk_scale_notify(struct ufs_hba *hba,
1297 bool up, enum ufs_notify_change_status status)
1298 {
1299 if (hba->vops && hba->vops->clk_scale_notify)
1300 return hba->vops->clk_scale_notify(hba, up, status);
1301 return 0;
1302 }
1303
ufshcd_vops_event_notify(struct ufs_hba * hba,enum ufs_event_type evt,void * data)1304 static inline void ufshcd_vops_event_notify(struct ufs_hba *hba,
1305 enum ufs_event_type evt,
1306 void *data)
1307 {
1308 if (hba->vops && hba->vops->event_notify)
1309 hba->vops->event_notify(hba, evt, data);
1310 }
1311
ufshcd_vops_setup_clocks(struct ufs_hba * hba,bool on,enum ufs_notify_change_status status)1312 static inline int ufshcd_vops_setup_clocks(struct ufs_hba *hba, bool on,
1313 enum ufs_notify_change_status status)
1314 {
1315 if (hba->vops && hba->vops->setup_clocks)
1316 return hba->vops->setup_clocks(hba, on, status);
1317 return 0;
1318 }
1319
ufshcd_vops_hce_enable_notify(struct ufs_hba * hba,bool status)1320 static inline int ufshcd_vops_hce_enable_notify(struct ufs_hba *hba,
1321 bool status)
1322 {
1323 if (hba->vops && hba->vops->hce_enable_notify)
1324 return hba->vops->hce_enable_notify(hba, status);
1325
1326 return 0;
1327 }
ufshcd_vops_link_startup_notify(struct ufs_hba * hba,bool status)1328 static inline int ufshcd_vops_link_startup_notify(struct ufs_hba *hba,
1329 bool status)
1330 {
1331 if (hba->vops && hba->vops->link_startup_notify)
1332 return hba->vops->link_startup_notify(hba, status);
1333
1334 return 0;
1335 }
1336
ufshcd_vops_phy_initialization(struct ufs_hba * hba)1337 static inline int ufshcd_vops_phy_initialization(struct ufs_hba *hba)
1338 {
1339 if (hba->vops && hba->vops->phy_initialization)
1340 return hba->vops->phy_initialization(hba);
1341
1342 return 0;
1343 }
1344
ufshcd_vops_pwr_change_notify(struct ufs_hba * hba,enum ufs_notify_change_status status,struct ufs_pa_layer_attr * dev_max_params,struct ufs_pa_layer_attr * dev_req_params)1345 static inline int ufshcd_vops_pwr_change_notify(struct ufs_hba *hba,
1346 enum ufs_notify_change_status status,
1347 struct ufs_pa_layer_attr *dev_max_params,
1348 struct ufs_pa_layer_attr *dev_req_params)
1349 {
1350 if (hba->vops && hba->vops->pwr_change_notify)
1351 return hba->vops->pwr_change_notify(hba, status,
1352 dev_max_params, dev_req_params);
1353
1354 return -ENOTSUPP;
1355 }
1356
ufshcd_vops_setup_task_mgmt(struct ufs_hba * hba,int tag,u8 tm_function)1357 static inline void ufshcd_vops_setup_task_mgmt(struct ufs_hba *hba,
1358 int tag, u8 tm_function)
1359 {
1360 if (hba->vops && hba->vops->setup_task_mgmt)
1361 return hba->vops->setup_task_mgmt(hba, tag, tm_function);
1362 }
1363
ufshcd_vops_hibern8_notify(struct ufs_hba * hba,enum uic_cmd_dme cmd,enum ufs_notify_change_status status)1364 static inline void ufshcd_vops_hibern8_notify(struct ufs_hba *hba,
1365 enum uic_cmd_dme cmd,
1366 enum ufs_notify_change_status status)
1367 {
1368 if (hba->vops && hba->vops->hibern8_notify)
1369 return hba->vops->hibern8_notify(hba, cmd, status);
1370 }
1371
ufshcd_vops_apply_dev_quirks(struct ufs_hba * hba)1372 static inline int ufshcd_vops_apply_dev_quirks(struct ufs_hba *hba)
1373 {
1374 if (hba->vops && hba->vops->apply_dev_quirks)
1375 return hba->vops->apply_dev_quirks(hba);
1376 return 0;
1377 }
1378
ufshcd_vops_fixup_dev_quirks(struct ufs_hba * hba)1379 static inline void ufshcd_vops_fixup_dev_quirks(struct ufs_hba *hba)
1380 {
1381 if (hba->vops && hba->vops->fixup_dev_quirks)
1382 hba->vops->fixup_dev_quirks(hba);
1383 }
1384
ufshcd_vops_suspend(struct ufs_hba * hba,enum ufs_pm_op op,enum ufs_notify_change_status status)1385 static inline int ufshcd_vops_suspend(struct ufs_hba *hba, enum ufs_pm_op op,
1386 enum ufs_notify_change_status status)
1387 {
1388 if (hba->vops && hba->vops->suspend)
1389 return hba->vops->suspend(hba, op, status);
1390
1391 return 0;
1392 }
1393
ufshcd_vops_resume(struct ufs_hba * hba,enum ufs_pm_op op)1394 static inline int ufshcd_vops_resume(struct ufs_hba *hba, enum ufs_pm_op op)
1395 {
1396 if (hba->vops && hba->vops->resume)
1397 return hba->vops->resume(hba, op);
1398
1399 return 0;
1400 }
1401
ufshcd_vops_dbg_register_dump(struct ufs_hba * hba)1402 static inline void ufshcd_vops_dbg_register_dump(struct ufs_hba *hba)
1403 {
1404 if (hba->vops && hba->vops->dbg_register_dump)
1405 hba->vops->dbg_register_dump(hba);
1406 }
1407
ufshcd_vops_device_reset(struct ufs_hba * hba)1408 static inline int ufshcd_vops_device_reset(struct ufs_hba *hba)
1409 {
1410 if (hba->vops && hba->vops->device_reset)
1411 return hba->vops->device_reset(hba);
1412
1413 return -EOPNOTSUPP;
1414 }
1415
ufshcd_vops_config_scaling_param(struct ufs_hba * hba,struct devfreq_dev_profile * profile,void * data)1416 static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba,
1417 struct devfreq_dev_profile
1418 *profile, void *data)
1419 {
1420 if (hba->vops && hba->vops->config_scaling_param)
1421 hba->vops->config_scaling_param(hba, profile, data);
1422 }
1423
1424 extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
1425
1426 /*
1427 * ufshcd_scsi_to_upiu_lun - maps scsi LUN to UPIU LUN
1428 * @scsi_lun: scsi LUN id
1429 *
1430 * Returns UPIU LUN id
1431 */
ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)1432 static inline u8 ufshcd_scsi_to_upiu_lun(unsigned int scsi_lun)
1433 {
1434 if (scsi_is_wlun(scsi_lun))
1435 return (scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID)
1436 | UFS_UPIU_WLUN_ID;
1437 else
1438 return scsi_lun & UFS_UPIU_MAX_UNIT_NUM_ID;
1439 }
1440
1441 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
1442 const char *prefix);
1443
1444 int __ufshcd_write_ee_control(struct ufs_hba *hba, u32 ee_ctrl_mask);
1445 int ufshcd_write_ee_control(struct ufs_hba *hba);
1446 int ufshcd_update_ee_control(struct ufs_hba *hba, u16 *mask, u16 *other_mask,
1447 u16 set, u16 clr);
1448
ufshcd_update_ee_drv_mask(struct ufs_hba * hba,u16 set,u16 clr)1449 static inline int ufshcd_update_ee_drv_mask(struct ufs_hba *hba,
1450 u16 set, u16 clr)
1451 {
1452 return ufshcd_update_ee_control(hba, &hba->ee_drv_mask,
1453 &hba->ee_usr_mask, set, clr);
1454 }
1455
ufshcd_update_ee_usr_mask(struct ufs_hba * hba,u16 set,u16 clr)1456 static inline int ufshcd_update_ee_usr_mask(struct ufs_hba *hba,
1457 u16 set, u16 clr)
1458 {
1459 return ufshcd_update_ee_control(hba, &hba->ee_usr_mask,
1460 &hba->ee_drv_mask, set, clr);
1461 }
1462
ufshcd_rpm_get_sync(struct ufs_hba * hba)1463 static inline int ufshcd_rpm_get_sync(struct ufs_hba *hba)
1464 {
1465 return pm_runtime_get_sync(&hba->sdev_ufs_device->sdev_gendev);
1466 }
1467
ufshcd_rpm_put_sync(struct ufs_hba * hba)1468 static inline int ufshcd_rpm_put_sync(struct ufs_hba *hba)
1469 {
1470 return pm_runtime_put_sync(&hba->sdev_ufs_device->sdev_gendev);
1471 }
1472
ufshcd_rpm_get_noresume(struct ufs_hba * hba)1473 static inline void ufshcd_rpm_get_noresume(struct ufs_hba *hba)
1474 {
1475 pm_runtime_get_noresume(&hba->sdev_ufs_device->sdev_gendev);
1476 }
1477
ufshcd_rpm_resume(struct ufs_hba * hba)1478 static inline int ufshcd_rpm_resume(struct ufs_hba *hba)
1479 {
1480 return pm_runtime_resume(&hba->sdev_ufs_device->sdev_gendev);
1481 }
1482
ufshcd_rpm_put(struct ufs_hba * hba)1483 static inline int ufshcd_rpm_put(struct ufs_hba *hba)
1484 {
1485 return pm_runtime_put(&hba->sdev_ufs_device->sdev_gendev);
1486 }
1487
1488 #endif /* End of Header */
1489