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Searched refs:uvd_dpm_enable_mask (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.h163 uint32_t uvd_dpm_enable_mask; member
Dvega12_hwmgr.h152 uint32_t uvd_dpm_enable_mask; member
Dvega10_hwmgr.h173 uint32_t uvd_dpm_enable_mask; member
Dvega20_hwmgr.h205 uint32_t uvd_dpm_enable_mask; member
/drivers/gpu/drm/radeon/
Dci_dpm.h107 u32 uvd_dpm_enable_mask; member
Dci_dpm.c3928 pi->dpm_level_enable_mask.uvd_dpm_enable_mask = 0; in ci_enable_uvd_dpm()
3932 pi->dpm_level_enable_mask.uvd_dpm_enable_mask |= 1 << i; in ci_enable_uvd_dpm()
3941 pi->dpm_level_enable_mask.uvd_dpm_enable_mask); in ci_enable_uvd_dpm()
/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dci_smumgr.c2877 data->dpm_level_enable_mask.uvd_dpm_enable_mask = 0; in ci_update_uvd_smc_table()
2881 data->dpm_level_enable_mask.uvd_dpm_enable_mask |= 1 << i; in ci_update_uvd_smc_table()
2886 data->dpm_level_enable_mask.uvd_dpm_enable_mask, in ci_update_uvd_smc_table()