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Searched refs:validation (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/pm/inc/
Dpower_state.h156 struct PP_StateValidationBlock validation; member
Damdgpu_smu.h145 struct smu_state_validation_block validation; member
/drivers/gpu/drm/amd/display/
DTODO33 6. DONE - Per-plane and per-stream validation
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dprocesspptables.c698 ps->validation.singleDisplayOnly = (0 != tmp); in init_non_clock_fields()
703 ps->validation.disallowOnDC = (0 != tmp); in init_non_clock_fields()
759 ps->validation.supportedPowerLevels = pnon_clock_info->ucRequiredPower; in init_non_clock_fields()
Dsmu7_hwmgr.c3248 power_state->validation.disallowOnDC = in smu7_get_pp_table_entry_callback_func_v1()
3260 power_state->validation.supportedPowerLevels = 0; in smu7_get_pp_table_entry_callback_func_v1()
3348 if (!state->validation.disallowOnDC) in smu7_get_pp_table_entry_v1()
3496 if (!state->validation.disallowOnDC) in smu7_get_pp_table_entry_v0()
Dvega10_hwmgr.c3129 power_state->validation.disallowOnDC = in vega10_get_pp_table_entry_callback_func()
3139 power_state->validation.supportedPowerLevels = 0; in vega10_get_pp_table_entry_callback_func()
3215 if (!state->validation.disallowOnDC) in vega10_get_pp_table_entry()
/drivers/gpu/drm/i915/
DKconfig.debug33 select SW_SYNC # signaling validation framework (igt/syncobj*)
/drivers/clocksource/
DKconfig345 This must be disabled for hardware validation purposes to detect any
/drivers/net/
DKconfig112 extra validation checks and unit tests at various points. This is