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Searched refs:vco1 (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dpll.c258 info->vco1.min_freq = nvbios_rd32(bios, data + 0); in nvbios_pll_parse()
259 info->vco1.max_freq = nvbios_rd32(bios, data + 4); in nvbios_pll_parse()
262 info->vco1.min_inputfreq = nvbios_rd32(bios, data + 16); in nvbios_pll_parse()
264 info->vco1.max_inputfreq = INT_MAX; in nvbios_pll_parse()
273 info->vco1.min_n = 0x5; in nvbios_pll_parse()
276 info->vco1.min_n = 0x1; in nvbios_pll_parse()
279 info->vco1.max_n = 0xff; in nvbios_pll_parse()
280 info->vco1.min_m = 0x1; in nvbios_pll_parse()
281 info->vco1.max_m = 0xd; in nvbios_pll_parse()
304 info->vco1.min_freq = nvbios_rd16(bios, data + 4) * 1000; in nvbios_pll_parse()
[all …]
/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dpllnv04.c41 int minvco = info->vco1.min_freq, maxvco = info->vco1.max_freq; in getMNP_single()
42 int minM = info->vco1.min_m, maxM = info->vco1.max_m; in getMNP_single()
43 int minN = info->vco1.min_n, maxN = info->vco1.max_n; in getMNP_single()
44 int minU = info->vco1.min_inputfreq; in getMNP_single()
45 int maxU = info->vco1.max_inputfreq; in getMNP_single()
140 int minvco1 = info->vco1.min_freq, maxvco1 = info->vco1.max_freq; in getMNP_double()
142 int minU1 = info->vco1.min_inputfreq, minU2 = info->vco2.min_inputfreq; in getMNP_double()
143 int maxU1 = info->vco1.max_inputfreq, maxU2 = info->vco2.max_inputfreq; in getMNP_double()
144 int minM1 = info->vco1.min_m, maxM1 = info->vco1.max_m; in getMNP_double()
145 int minN1 = info->vco1.min_n, maxN1 = info->vco1.max_n; in getMNP_double()
Dpllgt215.c36 *P = info->vco1.max_freq / freq; in gt215_pll_calc()
42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
43 lM = max(lM, (int)info->vco1.min_m); in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
45 hM = min(hM, (int)info->vco1.max_m); in gt215_pll_calc()
62 if (N < info->vco1.min_n) in gt215_pll_calc()
64 if (N > info->vco1.max_n) in gt215_pll_calc()
Dnv40.c135 if (khz < pll.vco1.max_freq) in nv40_clk_calc_pll()
/drivers/clk/imx/
Dclk-sscg-pll.c76 uint64_t vco1; member
135 temp_setup->vco2 = temp_setup->vco1; in clk_sscg_divq_lookup()
177 temp_setup->ref_div2 = temp_setup->vco1; in clk_sscg_divr2_lookup()
199 temp_setup->vco1 = ref; in clk_sscg_pll2_find_setup()
212 uint64_t vco1 = temp_setup->ref; in clk_sscg_divf1_lookup() local
214 do_div(vco1, temp_setup->divr1 + 1); in clk_sscg_divf1_lookup()
215 vco1 *= 2; in clk_sscg_divf1_lookup()
216 vco1 *= temp_setup->divf1 + 1; in clk_sscg_divf1_lookup()
218 ret = clk_sscg_pll2_find_setup(setup, temp_setup, vco1); in clk_sscg_divf1_lookup()
/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
Dpll.h72 } vco1, vco2; member
/drivers/gpu/drm/nouveau/dispnv04/
Dhw.c271 if (pv.M1 >= pll_lim.vco1.min_m && pv.M1 <= pll_lim.vco1.max_m && in nouveau_hw_fix_bad_vpll()
272 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n && in nouveau_hw_fix_bad_vpll()
279 pv.M1 = pll_lim.vco1.max_m; in nouveau_hw_fix_bad_vpll()
280 pv.N1 = pll_lim.vco1.min_n; in nouveau_hw_fix_bad_vpll()
Dcrtc.c146 if (drm->client.device.info.chipset > 0x40 && dot_clock <= (pll_lim.vco1.max_freq / 2)) in nv_crtc_calc_state_ext()
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramgk104.c1052 ram->mode = (next->freq > fuc->refpll.vco1.max_freq) ? 2 : 1; in gk104_ram_calc_xits()