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Searched refs:vxge_bVALn (Results 1 – 6 of 6) sorted by relevance

/drivers/net/ethernet/neterion/vxge/
Dvxge-reg.h31 #define vxge_bVALn(bits, loc, n) \ macro
35 vxge_bVALn(bits, 0, 16)
37 vxge_bVALn(bits, 48, 8)
39 vxge_bVALn(bits, 56, 8)
42 vxge_bVALn(bits, 3, 5)
44 vxge_bVALn(bits, 5, 3)
54 #define VXGE_EPROM_IMG_MAJOR(val) (u32) vxge_bVALn(val, 48, 4)
55 #define VXGE_EPROM_IMG_MINOR(val) (u32) vxge_bVALn(val, 52, 4)
56 #define VXGE_EPROM_IMG_FIX(val) (u32) vxge_bVALn(val, 56, 4)
57 #define VXGE_EPROM_IMG_BUILD(val) (u32) vxge_bVALn(val, 60, 4)
[all …]
Dvxge-config.h1113 #define VXGE_HW_NODBW_GET_TYPE(ctrl0) vxge_bVALn(ctrl0, 0, 8)
1117 #define VXGE_HW_NODBW_GET_LAST_TXD_NUMBER(ctrl0) vxge_bVALn(ctrl0, 32, 8)
1120 #define VXGE_HW_NODBW_GET_NO_SNOOP(ctrl0) vxge_bVALn(ctrl0, 56, 8)
1263 #define VXGE_HW_FIFO_TXD_T_CODE_GET(ctrl0) vxge_bVALn(ctrl0, 12, 4)
1388 #define VXGE_HW_RING_RXD_RTH_BUCKET_GET(ctrl0) vxge_bVALn(ctrl0, 0, 7)
1392 #define VXGE_HW_RING_RXD_FAST_PATH_ELIGIBLE_GET(ctrl0) vxge_bVALn(ctrl0, 8, 1)
1394 #define VXGE_HW_RING_RXD_L3_CKSUM_CORRECT_GET(ctrl0) vxge_bVALn(ctrl0, 9, 1)
1396 #define VXGE_HW_RING_RXD_L4_CKSUM_CORRECT_GET(ctrl0) vxge_bVALn(ctrl0, 10, 1)
1398 #define VXGE_HW_RING_RXD_T_CODE_GET(ctrl0) vxge_bVALn(ctrl0, 12, 4)
1403 #define VXGE_HW_RING_RXD_SYN_GET(ctrl0) vxge_bVALn(ctrl0, 16, 1)
[all …]
Dvxge-traffic.c106 writeq((u32)vxge_bVALn((VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW| in vxge_hw_vpath_intr_enable()
113 (u32)vxge_bVALn((VXGE_HW_KDFCCTL_ERRORS_REG_KDFCCTL_FIFO1_OVRWR| in vxge_hw_vpath_intr_enable()
124 (u32)vxge_bVALn(VXGE_HW_PRC_ALARM_REG_PRC_RING_BUMP, 0, 32), in vxge_hw_vpath_intr_enable()
134 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(( in vxge_hw_vpath_intr_enable()
292 (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), in vxge_hw_channel_msix_mask()
310 (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), in vxge_hw_channel_msix_unmask()
327 (u32) vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), in vxge_hw_channel_msix_clear()
447 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), in vxge_hw_device_mask_all()
466 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), in vxge_hw_device_unmask_all()
2187 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn( in vxge_hw_vpath_msix_set()
[all …]
Dvxge-traffic.h315 vxge_bVALn(bits, 0, 32)
318 vxge_bVALn(bits, 32, 32)
322 vxge_bVALn(bits, 0, 32)
325 vxge_bVALn(bits, 32, 32)
Dvxge-config.c148 __vxge_hw_pio_mem_write32_lower((u32)vxge_bVALn(val64, 32, 32), addr); in __vxge_hw_pio_mem_write64()
150 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), addr); in __vxge_hw_pio_mem_write64()
3590 *val = (u32)vxge_bVALn(val64, 32, 32); in __vxge_hw_vpath_pci_read()
4024 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), in __vxge_hw_vpath_reset()
5096 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), in vxge_hw_vpath_enable()
Dvxge-main.c3696 if (!vxge_bVALn(vpath_mask, i, 1)) in vxge_config_vpaths()
3726 if (!vxge_bVALn(vpath_mask, i, 1)) { in vxge_config_vpaths()
3986 if (!vxge_bVALn(vpath_mask, i, 1)) in vxge_print_parm()
4601 if (!vxge_bVALn(vpath_mask, i, 1)) in vxge_probe()