Home
last modified time | relevance | path

Searched refs:watermarks (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubbub.c141 struct dcn_watermark_set *watermarks, in hubbub21_program_urgent_watermarks() argument
151 if (safe_to_lower || watermarks->a.urgent_ns > hubbub1->watermarks.a.urgent_ns) { in hubbub21_program_urgent_watermarks()
152 hubbub1->watermarks.a.urgent_ns = watermarks->a.urgent_ns; in hubbub21_program_urgent_watermarks()
153 prog_wm_value = convert_and_clamp(watermarks->a.urgent_ns, in hubbub21_program_urgent_watermarks()
161 watermarks->a.urgent_ns, prog_wm_value); in hubbub21_program_urgent_watermarks()
162 } else if (watermarks->a.urgent_ns < hubbub1->watermarks.a.urgent_ns) in hubbub21_program_urgent_watermarks()
166 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks()
167 > hubbub1->watermarks.a.frac_urg_bw_flip) { in hubbub21_program_urgent_watermarks()
168 hubbub1->watermarks.a.frac_urg_bw_flip = watermarks->a.frac_urg_bw_flip; in hubbub21_program_urgent_watermarks()
171 DCHUBBUB_ARB_FRAC_URG_BW_FLIP_A, watermarks->a.frac_urg_bw_flip); in hubbub21_program_urgent_watermarks()
[all …]
Ddcn21_hubbub.h118 struct dcn_watermark_set *watermarks,
123 struct dcn_watermark_set *watermarks,
128 struct dcn_watermark_set *watermarks,
133 struct dcn_watermark_set *watermarks,
Ddcn21_resource.c1151 calculate_wm_set_for_vlevel(vlevel, table_entry, &context->bw_ctx.bw.dcn.watermarks.d, in dcn21_calculate_wm()
1156 calculate_wm_set_for_vlevel(vlevel, table_entry, &context->bw_ctx.bw.dcn.watermarks.c, in dcn21_calculate_wm()
1161 calculate_wm_set_for_vlevel(vlevel, table_entry, &context->bw_ctx.bw.dcn.watermarks.b, in dcn21_calculate_wm()
1167 calculate_wm_set_for_vlevel(vlevel, table_entry, &context->bw_ctx.bw.dcn.watermarks.a, in dcn21_calculate_wm()
/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubbub.c247 struct dcn_watermark_set *watermarks, in hubbub1_program_urgent_watermarks() argument
257 if (safe_to_lower || watermarks->a.urgent_ns > hubbub1->watermarks.a.urgent_ns) { in hubbub1_program_urgent_watermarks()
258 hubbub1->watermarks.a.urgent_ns = watermarks->a.urgent_ns; in hubbub1_program_urgent_watermarks()
259 prog_wm_value = convert_and_clamp(watermarks->a.urgent_ns, in hubbub1_program_urgent_watermarks()
266 watermarks->a.urgent_ns, prog_wm_value); in hubbub1_program_urgent_watermarks()
267 } else if (watermarks->a.urgent_ns < hubbub1->watermarks.a.urgent_ns) in hubbub1_program_urgent_watermarks()
270 if (safe_to_lower || watermarks->a.pte_meta_urgent_ns > hubbub1->watermarks.a.pte_meta_urgent_ns) { in hubbub1_program_urgent_watermarks()
271 hubbub1->watermarks.a.pte_meta_urgent_ns = watermarks->a.pte_meta_urgent_ns; in hubbub1_program_urgent_watermarks()
272 prog_wm_value = convert_and_clamp(watermarks->a.pte_meta_urgent_ns, in hubbub1_program_urgent_watermarks()
277 watermarks->a.pte_meta_urgent_ns, prog_wm_value); in hubbub1_program_urgent_watermarks()
[all …]
Ddcn10_hubbub.h299 struct dcn_watermark_set watermarks; member
313 struct dcn_watermark_set *watermarks,
336 struct dcn_watermark_set *watermarks,
341 struct dcn_watermark_set *watermarks,
346 struct dcn_watermark_set *watermarks,
Ddcn10_hw_sequencer.c3083 &context->bw_ctx.bw.dcn.watermarks, in dcn10_prepare_bandwidth()
3116 &context->bw_ctx.bw.dcn.watermarks, in dcn10_optimize_bandwidth()
/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c567 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns =
569 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns =
571 context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns =
573 context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000;
574 context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = v->urgent_watermark * 1000;
581 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_exit_ns =
583 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns =
585 context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.pstate_change_ns =
587 context->bw_ctx.bw.dcn.watermarks.c.pte_meta_urgent_ns = v->ptemeta_urgent_watermark * 1000;
588 context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = v->urgent_watermark * 1000;
[all …]
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_hubbub.c98 struct dcn_watermark_set *watermarks, in hubbub3_program_watermarks() argument
105 if (hubbub21_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub3_program_watermarks()
108 if (hubbub21_program_stutter_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub3_program_watermarks()
111 if (hubbub21_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub3_program_watermarks()
379 uint32_t prog_wm_value = convert_and_clamp(hubbub1->watermarks.a.urgent_ns, in hubbub3_force_wm_propagate_to_pipes()
Ddcn30_resource.c2236 …context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn30_calculate_wm_and_dlg()
2237 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter… in dcn30_calculate_wm_and_dlg()
2238 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->b… in dcn30_calculate_wm_and_dlg()
2239 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&con… in dcn30_calculate_wm_and_dlg()
2240 …context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, … in dcn30_calculate_wm_and_dlg()
2241 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&context->b… in dcn30_calculate_wm_and_dlg()
2242 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(&… in dcn30_calculate_wm_and_dlg()
2243 …context->bw_ctx.bw.dcn.watermarks.b.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p… in dcn30_calculate_wm_and_dlg()
2292 …context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn… in dcn30_calculate_wm_and_dlg()
2293 …context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter… in dcn30_calculate_wm_and_dlg()
[all …]
Ddcn30_hubbub.h115 struct dcn_watermark_set *watermarks,
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubbub.c576 struct dcn_watermark_set *watermarks, in hubbub2_program_watermarks() argument
586 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub2_program_watermarks()
589 if (hubbub1_program_stutter_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub2_program_watermarks()
601 hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower); in hubbub2_program_watermarks()
Ddcn20_resource.c3023 …context->bw_ctx.bw.dcn.watermarks.b.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn…
3024 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter…
3025 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(&context->b…
3026 …context->bw_ctx.bw.dcn.watermarks.b.cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(&con…
3027 …context->bw_ctx.bw.dcn.watermarks.b.pte_meta_urgent_ns = get_wm_memory_trip(&context->bw_ctx.dml, …
3028 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(&context->b…
3029 …context->bw_ctx.bw.dcn.watermarks.b.frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(&…
3030 …context->bw_ctx.bw.dcn.watermarks.b.urgent_latency_ns = get_urgent_latency(&context->bw_ctx.dml, p…
3037 …context->bw_ctx.bw.dcn.watermarks.c.urgent_ns = get_wm_urgent(&context->bw_ctx.dml, pipes, pipe_cn…
3038 …context->bw_ctx.bw.dcn.watermarks.c.cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter…
[all …]
Ddcn20_hubbub.h82 struct dcn_watermark_set watermarks; member
Ddcn20_hwseq.c1787 &context->bw_ctx.bw.dcn.watermarks, in dcn20_prepare_bandwidth()
1800 &context->bw_ctx.bw.dcn.watermarks, in dcn20_optimize_bandwidth()
/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddchubbub.h145 struct dcn_watermark_set *watermarks,
/drivers/gpu/drm/amd/display/dc/inc/
Dcore_types.h375 struct dcn_watermark_set watermarks; member
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.h45 struct watermarks { struct
Dsmu_helper.c717 struct watermarks *table = wt_table; in smu_set_watermarks_for_clocks_ranges()