| /drivers/clk/mmp/ |
| D | clk-apmu.c | 25 u32 enable_mask; member
69 void __iomem *base, u32 enable_mask, spinlock_t *lock) in mmp_clk_register_apmu()
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| /drivers/acpi/acpica/ |
| D | hwgpe.c | 138 u64 enable_mask; in acpi_hw_low_set_gpe() local
340 acpi_hw_gpe_enable_write(u8 enable_mask, in acpi_hw_gpe_enable_write()
447 u8 enable_mask; in acpi_hw_enable_runtime_gpe_block() local
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| /drivers/clk/qcom/ |
| D | clk-pll.c | 147 u32 enable_mask = PLL_OUTCTRL | PLL_BYPASSNL | PLL_RESET_N; in clk_pll_set_rate() local
307 u32 enable_mask = PLL_OUTCTRL | PLL_BYPASSNL | PLL_RESET_N; in clk_pll_sr2_set_rate() local
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| D | clk-regmap.h | 24 unsigned int enable_mask; member
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| /drivers/gpu/drm/i915/display/ |
| D | intel_fifo_underrun.c | 94 u32 enable_mask; in i9xx_check_fifo_underruns() local
119 u32 enable_mask = i915_pipestat_enable_mask(dev_priv, pipe); in i9xx_set_fifo_underrun_reporting() local
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| /drivers/gpu/drm/i915/ |
| D | i915_irq.c | 450 u32 enable_mask = status_mask << 16; in i915_pipestat_enable_mask() local
494 u32 enable_mask; in i915_enable_pipestat() local
517 u32 enable_mask; in i915_disable_pipestat() local
1317 u32 status_mask, enable_mask, iir_bit = 0; in i9xx_pipestat_irq_ack() local
2767 u32 enable_mask; in vlv_display_irq_postinstall() local
3040 u32 enable_mask) in icp_ddi_hpd_detection_setup()
3050 u32 enable_mask) in icp_tc_hpd_detection_setup()
3544 u16 enable_mask; in i8xx_irq_postinstall() local
3713 u32 enable_mask; in i915_irq_postinstall() local
3819 u32 enable_mask; in i965_irq_postinstall() local
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| /drivers/gpu/drm/i915/gt/ |
| D | intel_gt_pm_irq.c | 93 void gen6_gt_pm_enable_irq(struct intel_gt *gt, u32 enable_mask) in gen6_gt_pm_enable_irq()
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| /drivers/gpu/drm/amd/display/dc/irq/ |
| D | irq_service.h | 50 uint32_t enable_mask; member
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| /drivers/gpu/drm/amd/pm/powerplay/ |
| D | kv_smc.c | 56 int amdgpu_kv_dpm_get_enable_mask(struct amdgpu_device *adev, u32 *enable_mask) in amdgpu_kv_dpm_get_enable_mask()
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| /drivers/gpu/drm/radeon/ |
| D | kv_smc.c | 53 int kv_dpm_get_enable_mask(struct radeon_device *rdev, u32 *enable_mask) in kv_dpm_get_enable_mask()
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| D | dce6_afmt.c | 259 u8 enable_mask) in dce6_audio_enable()
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| D | evergreen_hdmi.c | 39 u8 enable_mask) in dce4_audio_enable()
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| /drivers/iio/light/ |
| D | tcs3472.c | 548 u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON; in tcs3472_powerdown() local
588 u8 enable_mask = TCS3472_ENABLE_AEN | TCS3472_ENABLE_PON; in tcs3472_resume() local
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| /drivers/regulator/ |
| D | pbias-regulator.c | 32 u32 enable_mask; member
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| D | aat2870-regulator.c | 25 u8 enable_mask; member
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| /drivers/clk/microchip/ |
| D | clk-core.h | 53 const u32 enable_mask; member
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| /drivers/input/misc/ |
| D | pm8xxx-vibrator.c | 23 unsigned int enable_mask; member
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| /drivers/clk/ |
| D | clk-palmas.c | 36 unsigned int enable_mask; member
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| /drivers/bus/ |
| D | qcom-ebi2.c | 109 u32 enable_mask; member
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| /drivers/watchdog/ |
| D | st_lpc_wdt.c | 38 unsigned int enable_mask; member
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| /drivers/pwm/ |
| D | pwm-mtk-disp.c | 31 u32 enable_mask; member
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| /drivers/clocksource/ |
| D | timer-armada-370-xp.c | 82 static u32 enable_mask; variable
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| /drivers/usb/dwc3/ |
| D | drd.c | 27 static void dwc3_otg_enable_events(struct dwc3 *dwc, u32 enable_mask) in dwc3_otg_enable_events()
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| /drivers/interconnect/qcom/ |
| D | icc-rpmh.h | 101 u32 enable_mask; member
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| /drivers/clk/mvebu/ |
| D | clk-corediv.c | 84 u32 enable_mask = BIT(desc->fieldbit) << soc_desc->enable_bit_offset; in clk_corediv_is_enabled() local
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