Home
last modified time | relevance | path

Searched refs:GATE (Results 1 – 25 of 34) sorted by relevance

12

/drivers/clk/samsung/
Dclk-exynos5433.c558 GATE(CLK_ACLK_G3D_400, "aclk_g3d_400", "div_aclk_g3d_400",
560 GATE(CLK_ACLK_IMEM_SSSX_266, "aclk_imem_sssx_266",
563 GATE(CLK_ACLK_BUS0_400, "aclk_bus0_400", "div_aclk_bus0_400",
566 GATE(CLK_ACLK_BUS1_400, "aclk_bus1_400", "div_aclk_bus1_400",
569 GATE(CLK_ACLK_IMEM_200, "aclk_imem_200", "div_aclk_imem_200",
572 GATE(CLK_ACLK_IMEM_266, "aclk_imem_266", "div_aclk_imem_266",
575 GATE(CLK_ACLK_PERIC_66, "aclk_peric_66", "div_aclk_peric_66_b",
578 GATE(CLK_ACLK_PERIS_66, "aclk_peris_66", "div_aclk_peris_66_b",
581 GATE(CLK_ACLK_MSCL_400, "aclk_mscl_400", "div_aclk_mscl_400",
584 GATE(CLK_ACLK_FSYS_200, "aclk_fsys_200", "div_aclk_fsys_200",
[all …]
Dclk-exynos5250.c444 GATE(CLK_MDMA0, "mdma0", "div_aclk266", GATE_IP_ACP, 1, 0, 0),
445 GATE(CLK_SSS, "sss", "div_aclk266", GATE_IP_ACP, 2, 0, 0),
446 GATE(CLK_G2D, "g2d", "div_aclk200", GATE_IP_ACP, 3, 0, 0),
447 GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "div_aclk266", GATE_IP_ACP, 5, 0, 0),
452 GATE(CLK_SCLK_CAM_BAYER, "sclk_cam_bayer", "div_cam_bayer",
454 GATE(CLK_SCLK_CAM0, "sclk_cam0", "div_cam0",
456 GATE(CLK_SCLK_CAM1, "sclk_cam1", "div_cam1",
458 GATE(CLK_SCLK_GSCL_WA, "sclk_gscl_wa", "div_gscl_wa",
460 GATE(CLK_SCLK_GSCL_WB, "sclk_gscl_wb", "div_gscl_wb",
463 GATE(CLK_SCLK_FIMD1, "sclk_fimd1", "div_fimd1",
[all …]
Dclk-exynos3250.c439 GATE(CLK_ASYNC_G3D, "async_g3d", "div_aclk_100", GATE_IP_LEFTBUS, 6,
441 GATE(CLK_ASYNC_MFCL, "async_mfcl", "div_aclk_100", GATE_IP_LEFTBUS, 4,
443 GATE(CLK_PPMULEFT, "ppmuleft", "div_aclk_100", GATE_IP_LEFTBUS, 1,
445 GATE(CLK_GPIO_LEFT, "gpio_left", "div_aclk_100", GATE_IP_LEFTBUS, 0,
449 GATE(CLK_ASYNC_ISPMX, "async_ispmx", "div_aclk_100",
451 GATE(CLK_ASYNC_FSYSD, "async_fsysd", "div_aclk_100",
453 GATE(CLK_ASYNC_LCD0X, "async_lcd0x", "div_aclk_100",
455 GATE(CLK_ASYNC_CAMX, "async_camx", "div_aclk_100", GATE_IP_RIGHTBUS, 2,
457 GATE(CLK_PPMURIGHT, "ppmuright", "div_aclk_100", GATE_IP_RIGHTBUS, 1,
459 GATE(CLK_GPIO_RIGHT, "gpio_right", "div_aclk_100", GATE_IP_RIGHTBUS, 0,
[all …]
Dclk-s5pv210.c547 GATE(CLK_ROTATOR, "rotator", "dout_hclkd", CLK_GATE_IP0, 29, 0, 0),
548 GATE(CLK_FIMC2, "fimc2", "dout_hclkd", CLK_GATE_IP0, 26, 0, 0),
549 GATE(CLK_FIMC1, "fimc1", "dout_hclkd", CLK_GATE_IP0, 25, 0, 0),
550 GATE(CLK_FIMC0, "fimc0", "dout_hclkd", CLK_GATE_IP0, 24, 0, 0),
551 GATE(CLK_PDMA0, "pdma0", "dout_hclkp", CLK_GATE_IP0, 3, 0, 0),
552 GATE(CLK_MDMA, "mdma", "dout_hclkd", CLK_GATE_IP0, 2, 0, 0),
554 GATE(CLK_SROMC, "sromc", "dout_hclkp", CLK_GATE_IP1, 26, 0, 0),
555 GATE(CLK_NANDXL, "nandxl", "dout_hclkp", CLK_GATE_IP1, 24, 0, 0),
556 GATE(CLK_USB_OTG, "usb_otg", "dout_hclkp", CLK_GATE_IP1, 16, 0, 0),
557 GATE(CLK_TVENC, "tvenc", "dout_hclkd", CLK_GATE_IP1, 10, 0, 0),
[all …]
Dclk-exynos4.c713 GATE(CLK_PPMULEFT, "ppmuleft", "aclk200", GATE_IP_LEFTBUS, 1, 0, 0),
714 GATE(CLK_PPMURIGHT, "ppmuright", "aclk200", GATE_IP_RIGHTBUS, 1, 0, 0),
715 GATE(CLK_SCLK_HDMI, "sclk_hdmi", "mout_hdmi", SRC_MASK_TV, 0, 0, 0),
716 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", SRC_MASK_PERIL1, 8, 0,
718 GATE(CLK_JPEG, "jpeg", "aclk160", GATE_IP_CAM, 6, 0, 0),
719 GATE(CLK_MIE0, "mie0", "aclk160", GATE_IP_LCD0, 1, 0, 0),
720 GATE(CLK_DSIM0, "dsim0", "aclk160", GATE_IP_LCD0, 3, 0, 0),
721 GATE(CLK_FIMD1, "fimd1", "aclk160", E4210_GATE_IP_LCD1, 0, 0, 0),
722 GATE(CLK_MIE1, "mie1", "aclk160", E4210_GATE_IP_LCD1, 1, 0, 0),
723 GATE(CLK_DSIM1, "dsim1", "aclk160", E4210_GATE_IP_LCD1, 3, 0, 0),
[all …]
Dclk-exynos7.c144 GATE(ACLK_CCORE_133, "aclk_ccore_133", "dout_aclk_ccore_133",
147 GATE(ACLK_MSCL_532, "aclk_mscl_532", "dout_aclk_mscl_532",
150 GATE(ACLK_PERIS_66, "aclk_peris_66", "dout_aclk_peris_66",
153 GATE(SCLK_AUD_PLL, "sclk_aud_pll", "dout_sclk_aud_pll",
155 GATE(SCLK_MFC_PLL_B, "sclk_mfc_pll_b", "dout_sclk_mfc_pll",
157 GATE(SCLK_MFC_PLL_A, "sclk_mfc_pll_a", "dout_sclk_mfc_pll",
159 GATE(SCLK_BUS1_PLL_B, "sclk_bus1_pll_b", "dout_sclk_bus1_pll",
161 GATE(SCLK_BUS1_PLL_A, "sclk_bus1_pll_a", "dout_sclk_bus1_pll",
163 GATE(SCLK_BUS0_PLL_B, "sclk_bus0_pll_b", "dout_sclk_bus0_pll",
165 GATE(SCLK_BUS0_PLL_A, "sclk_bus0_pll_a", "dout_sclk_bus0_pll",
[all …]
Dclk-exynos5420.c542 GATE(CLK_ACLK550_CAM, "aclk550_cam", "mout_user_aclk550_cam",
544 GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler",
586 GATE(CLK_SECKEY, "seckey", "aclk66_psgen", GATE_BUS_PERIS1, 1, 0, 0),
588 GATE(CLK_MAU_EPLL, "mau_epll", "mout_mau_epll_clk",
590 GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0",
592 GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0",
929 GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", GATE_IP_G2D, 1, 0, 0),
930 GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0),
931 GATE(CLK_G2D, "g2d", "aclk333_g2d", GATE_IP_G2D, 3, 0, 0),
932 GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", GATE_IP_G2D, 5, 0, 0),
[all …]
Dclk-exynos5260.c114 GATE(AUD_SCLK_I2S, "sclk_aud_i2s", "dout_sclk_aud_i2s",
116 GATE(AUD_SCLK_PCM, "sclk_aud_pcm", "dout_sclk_aud_pcm",
118 GATE(AUD_SCLK_AUD_UART, "sclk_aud_uart", "dout_sclk_aud_uart",
121 GATE(AUD_CLK_SRAMC, "clk_sramc", "dout_aclk_aud_131", EN_IP_AUD,
123 GATE(AUD_CLK_DMAC, "clk_dmac", "dout_aclk_aud_131",
125 GATE(AUD_CLK_I2S, "clk_i2s", "dout_aclk_aud_131", EN_IP_AUD, 2, 0, 0),
126 GATE(AUD_CLK_PCM, "clk_pcm", "dout_aclk_aud_131", EN_IP_AUD, 3, 0, 0),
127 GATE(AUD_CLK_AUD_UART, "clk_aud_uart", "dout_aclk_aud_131",
284 GATE(DISP_MOUT_HDMI_PHY_PIXEL_USER, "sclk_hdmi_link_i_pixel",
287 GATE(DISP_SCLK_PIXEL, "sclk_hdmi_phy_pixel_clki",
[all …]
Dclk-exynos5410.c166 GATE(CLK_SSS, "sss", "aclk266", GATE_IP_G2D, 2, 0, 0),
167 GATE(CLK_MCT, "mct", "aclk66", GATE_IP_PERIS, 18, 0, 0),
168 GATE(CLK_WDT, "wdt", "aclk66", GATE_IP_PERIS, 19, 0, 0),
169 GATE(CLK_RTC, "rtc", "aclk66", GATE_IP_PERIS, 20, 0, 0),
170 GATE(CLK_TMU, "tmu", "aclk66", GATE_IP_PERIS, 21, 0, 0),
172 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0",
174 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1",
176 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2",
179 GATE(CLK_MMC0, "sdmmc0", "aclk200", GATE_BUS_FSYS0, 12, 0, 0),
180 GATE(CLK_MMC1, "sdmmc1", "aclk200", GATE_BUS_FSYS0, 13, 0, 0),
[all …]
Dclk-s3c2443.c112 GATE(SCLK_HSMMC_EXT, "sclk_hsmmcext", "ext", SCLKCON, 13, 0, 0),
113 GATE(SCLK_HSMMC1, "sclk_hsmmc1", "div_hsmmc1", SCLKCON, 12, 0, 0),
114 GATE(SCLK_FIMD, "sclk_fimd", "div_fimd", SCLKCON, 10, 0, 0),
115 GATE(SCLK_I2S0, "sclk_i2s0", "mux_i2s0", SCLKCON, 9, 0, 0),
116 GATE(SCLK_UART, "sclk_uart", "div_uart", SCLKCON, 8, 0, 0),
117 GATE(SCLK_USBH, "sclk_usbhost", "div_usbhost", SCLKCON, 1, 0, 0),
118 GATE(HCLK_DRAM, "dram", "hclk", HCLKCON, 19, CLK_IGNORE_UNUSED, 0),
119 GATE(HCLK_SSMC, "ssmc", "hclk", HCLKCON, 18, CLK_IGNORE_UNUSED, 0),
120 GATE(HCLK_HSMMC1, "hsmmc1", "hclk", HCLKCON, 16, 0, 0),
121 GATE(HCLK_USBD, "usb-device", "hclk", HCLKCON, 12, 0, 0),
[all …]
Dclk-exynos4412-isp.c48 GATE(CLK_ISP_FIMC_ISP, "isp", "aclk200", E4X12_GATE_ISP0, 0, 0, 0),
49 GATE(CLK_ISP_FIMC_DRC, "drc", "aclk200", E4X12_GATE_ISP0, 1, 0, 0),
50 GATE(CLK_ISP_FIMC_FD, "fd", "aclk200", E4X12_GATE_ISP0, 2, 0, 0),
51 GATE(CLK_ISP_FIMC_LITE0, "lite0", "aclk200", E4X12_GATE_ISP0, 3, 0, 0),
52 GATE(CLK_ISP_FIMC_LITE1, "lite1", "aclk200", E4X12_GATE_ISP0, 4, 0, 0),
53 GATE(CLK_ISP_MCUISP, "mcuisp", "aclk200", E4X12_GATE_ISP0, 5, 0, 0),
54 GATE(CLK_ISP_GICISP, "gicisp", "aclk200", E4X12_GATE_ISP0, 7, 0, 0),
55 GATE(CLK_ISP_SMMU_ISP, "smmu_isp", "aclk200", E4X12_GATE_ISP0, 8, 0, 0),
56 GATE(CLK_ISP_SMMU_DRC, "smmu_drc", "aclk200", E4X12_GATE_ISP0, 9, 0, 0),
57 GATE(CLK_ISP_SMMU_FD, "smmu_fd", "aclk200", E4X12_GATE_ISP0, 10, 0, 0),
[all …]
Dclk-s3c2412.c106 GATE(PCLK_WDT, "wdt", "pclk", CLKCON, 28, 0, 0),
107 GATE(PCLK_SPI, "spi", "pclk", CLKCON, 27, 0, 0),
108 GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 26, 0, 0),
109 GATE(PCLK_I2C, "i2c", "pclk", CLKCON, 25, 0, 0),
110 GATE(PCLK_ADC, "adc", "pclk", CLKCON, 24, 0, 0),
111 GATE(PCLK_RTC, "rtc", "pclk", CLKCON, 23, 0, 0),
112 GATE(PCLK_GPIO, "gpio", "pclk", CLKCON, 22, CLK_IGNORE_UNUSED, 0),
113 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 21, 0, 0),
114 GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 20, 0, 0),
115 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 19, 0, 0),
[all …]
/drivers/clk/rockchip/
Dclk-rk3368.c282 GATE(0, "apllb_core", "apllb", CLK_IGNORE_UNUSED,
284 GATE(0, "gpllb_core", "gpll", CLK_IGNORE_UNUSED,
287 GATE(0, "aplll_core", "aplll", CLK_IGNORE_UNUSED,
289 GATE(0, "gplll_core", "gpll", CLK_IGNORE_UNUSED,
306 GATE(0, "apllb_cs", "apllb", CLK_IGNORE_UNUSED,
308 GATE(0, "aplll_cs", "aplll", CLK_IGNORE_UNUSED,
310 GATE(0, "gpll_cs", "gpll", CLK_IGNORE_UNUSED,
321 GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3368_CLKGATE_CON(7), 10, GFLAGS),
323 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED,
325 GATE(0, "gpll_ddr", "gpll", 0,
[all …]
Dclk-rk3399.c404 GATE(SCLK_USB2PHY0_REF, "clk_usb2phy0_ref", "xin24m", CLK_IGNORE_UNUSED,
406 GATE(SCLK_USB2PHY1_REF, "clk_usb2phy1_ref", "xin24m", CLK_IGNORE_UNUSED,
409 GATE(0, "clk_usbphy0_480m_src", "clk_usbphy0_480m", 0,
411 GATE(0, "clk_usbphy1_480m_src", "clk_usbphy1_480m", 0,
426 GATE(ACLK_USB3_NOC, "aclk_usb3_noc", "aclk_usb3", CLK_IGNORE_UNUSED,
428 GATE(ACLK_USB3OTG0, "aclk_usb3otg0", "aclk_usb3", 0,
430 GATE(ACLK_USB3OTG1, "aclk_usb3otg1", "aclk_usb3", 0,
432 GATE(ACLK_USB3_RKSOC_AXI_PERF, "aclk_usb3_rksoc_axi_perf", "aclk_usb3", 0,
434 GATE(ACLK_USB3_GRF, "aclk_usb3_grf", "aclk_usb3", 0,
437 GATE(SCLK_USB3OTG0_REF, "clk_usb3otg0_ref", "xin24m", 0,
[all …]
Dclk-rk3228.c219 GATE(0, "apll_ddr", "apll", CLK_IGNORE_UNUSED,
221 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED,
223 GATE(0, "gpll_ddr", "gpll", CLK_IGNORE_UNUSED,
228 GATE(0, "ddrc", "ddrphy_pre", CLK_IGNORE_UNUSED,
234 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED,
236 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
238 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED,
256 GATE(0, "hdmiphy_aclk_cpu", "hdmiphy", CLK_IGNORE_UNUSED,
258 GATE(0, "gpll_aclk_cpu", "gpll", CLK_IGNORE_UNUSED,
260 GATE(0, "cpll_aclk_cpu", "cpll", CLK_IGNORE_UNUSED,
[all …]
Dclk-rk3328.c285 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
287 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED,
289 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED,
291 GATE(0, "npll_core", "npll", CLK_IGNORE_UNUSED,
299 GATE(0, "aclk_core_niu", "aclk_core", 0,
301 GATE(0, "aclk_gic400", "aclk_core", CLK_IGNORE_UNUSED,
304 GATE(0, "clk_jtag", "jtag_clkin", CLK_IGNORE_UNUSED,
311 GATE(ACLK_GPU, "aclk_gpu", "aclk_gpu_pre", CLK_SET_RATE_PARENT,
313 GATE(0, "aclk_gpu_niu", "aclk_gpu_pre", 0,
320 GATE(0, "clk_ddrmsch", "clk_ddr", CLK_IGNORE_UNUSED,
[all …]
Dclk-rv1108.c200 GATE(0, "dpll_core", "dpll", CLK_IGNORE_UNUSED,
202 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
204 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED,
212 GATE(ACLK_CORE, "aclk_core", "aclkenm_core", CLK_IGNORE_UNUSED,
214 GATE(0, "pclk_dbg", "pclken_dbg", CLK_IGNORE_UNUSED,
226 GATE(ACLK_RKVENC, "aclk_rkvenc", "aclk_rkvenc_pre", 0,
228 GATE(HCLK_RKVENC, "hclk_rkvenc", "hclk_rkvenc_pre", 0,
230 GATE(0, "aclk_rkvenc_niu", "aclk_rkvenc_pre", CLK_IGNORE_UNUSED,
232 GATE(0, "hclk_rkvenc_niu", "hclk_rkvenc_pre", CLK_IGNORE_UNUSED,
251 GATE(ACLK_RKVDEC, "aclk_rkvdec", "aclk_rkvdec_pre", 0,
[all …]
Dclk-rk3288.c286 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
288 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED,
318 GATE(0, "pclk_dbg", "pclk_dbg_pre", 0,
320 GATE(0, "cs_dbg", "pclk_dbg_pre", CLK_IGNORE_UNUSED,
322 GATE(0, "pclk_core_niu", "pclk_dbg_pre", 0,
325 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED,
327 GATE(0, "gpll_ddr", "gpll", 0,
333 GATE(0, "gpll_aclk_cpu", "gpll", CLK_IGNORE_UNUSED,
335 GATE(0, "cpll_aclk_cpu", "cpll", CLK_IGNORE_UNUSED,
341 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", CLK_IGNORE_UNUSED,
[all …]
Dclk-rk3128.c208 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED,
210 GATE(0, "gpll_div2_ddr", "gpll_div2", CLK_IGNORE_UNUSED,
218 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
220 GATE(0, "gpll_div2_core", "gpll_div2", CLK_IGNORE_UNUSED,
237 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_src", 0,
277 GATE(0, "gpll_peri", "gpll", CLK_IGNORE_UNUSED,
279 GATE(0, "cpll_peri", "cpll", CLK_IGNORE_UNUSED,
281 GATE(0, "gpll_div2_peri", "gpll_div2", CLK_IGNORE_UNUSED,
283 GATE(0, "gpll_div3_peri", "gpll_div3", CLK_IGNORE_UNUSED,
293 GATE(ACLK_PERI, "aclk_peri", "aclk_peri_src", 0,
[all …]
Dclk-px30.c277 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
279 GATE(0, "gpll_core", "gpll", CLK_IGNORE_UNUSED,
287 GATE(0, "aclk_core_niu", "aclk_core", CLK_IGNORE_UNUSED,
289 GATE(0, "aclk_core_prf", "aclk_core", CLK_IGNORE_UNUSED,
291 GATE(0, "pclk_dbg_niu", "pclk_dbg", CLK_IGNORE_UNUSED,
293 GATE(0, "pclk_core_dbg", "pclk_dbg", CLK_IGNORE_UNUSED,
295 GATE(0, "pclk_core_grf", "pclk_dbg", CLK_IGNORE_UNUSED,
298 GATE(0, "clk_jtag", "jtag_clkin", CLK_IGNORE_UNUSED,
300 GATE(SCLK_PVTM, "clk_pvtm", "xin24m", 0,
319 GATE(0, "aclk_gpu_niu", "aclk_gpu", CLK_IGNORE_UNUSED,
[all …]
Dclk-rk3188.c278 GATE(0, "gpll_armclk", "gpll", 0, RK2928_CLKGATE_CON(0), 1, GFLAGS),
288 GATE(HCLK_VEPU, "hclk_vepu", "aclk_vepu", 0,
293 GATE(HCLK_VDPU, "hclk_vdpu", "aclk_vdpu", 0,
296 GATE(0, "gpll_ddr", "gpll", CLK_IGNORE_UNUSED,
302 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_pre", 0,
305 GATE(0, "atclk_cpu", "pclk_cpu_pre", 0,
307 GATE(PCLK_CPU, "pclk_cpu", "pclk_cpu_pre", 0,
309 GATE(HCLK_CPU, "hclk_cpu", "hclk_cpu_pre", CLK_IGNORE_UNUSED,
319 GATE(ACLK_PERI, "aclk_peri", "aclk_peri_pre", 0,
336 GATE(0, "pclkin_cif0", "ext_cif0", 0,
[all …]
Dclk-rk3308.c291 GATE(0, "apll_core", "apll", CLK_IGNORE_UNUSED,
293 GATE(0, "vpll0_core", "vpll0", CLK_IGNORE_UNUSED,
295 GATE(0, "vpll1_core", "vpll1", CLK_IGNORE_UNUSED,
304 GATE(0, "clk_jtag", "jtag_clkin", CLK_IGNORE_UNUSED,
307 GATE(SCLK_PVTM_CORE, "clk_pvtm_core", "xin24m", 0,
320 GATE(PCLK_DDR, "pclk_ddr", "pclk_bus", CLK_IGNORE_UNUSED,
336 GATE(SCLK_UART0, "clk_uart0", "clk_uart0_mux", 0,
346 GATE(SCLK_UART1, "clk_uart1", "clk_uart1_mux", 0,
356 GATE(SCLK_UART2, "clk_uart2", "clk_uart2_mux", CLK_SET_RATE_PARENT,
366 GATE(SCLK_UART3, "clk_uart3", "clk_uart3_mux", 0,
[all …]
Dclk-rk3036.c172 GATE(0, "gpll_armclk", "gpll", CLK_IGNORE_UNUSED,
181 GATE(0, "dpll_ddr", "dpll", CLK_IGNORE_UNUSED,
183 GATE(0, "gpll_ddr", "gpll", CLK_IGNORE_UNUSED,
196 GATE(0, "dpll_cpu", "dpll", 0, RK2928_CLKGATE_CON(10), 8, GFLAGS),
197 GATE(0, "gpll_cpu", "gpll", 0, RK2928_CLKGATE_CON(0), 1, GFLAGS),
200 GATE(ACLK_CPU, "aclk_cpu", "aclk_cpu_src", CLK_IGNORE_UNUSED,
213 GATE(ACLK_PERI, "aclk_peri", "aclk_peri_src", 0,
217 GATE(PCLK_PERI, "pclk_peri", "pclk_peri_src", 0,
221 GATE(HCLK_PERI, "hclk_peri", "hclk_peri_src", 0,
316 GATE(SCLK_I2S, "sclk_i2s", "i2s_pre", CLK_SET_RATE_PARENT,
[all …]
/drivers/clk/pistachio/
Dclk-pistachio.c19 GATE(CLK_MIPS, "mips", "mips_div", 0x104, 0),
20 GATE(CLK_AUDIO_IN, "audio_in", "audio_clk_in_gate", 0x104, 1),
21 GATE(CLK_AUDIO, "audio", "audio_div", 0x104, 2),
22 GATE(CLK_I2S, "i2s", "i2s_div", 0x104, 3),
23 GATE(CLK_SPDIF, "spdif", "spdif_div", 0x104, 4),
24 GATE(CLK_AUDIO_DAC, "audio_dac", "audio_dac_div", 0x104, 5),
25 GATE(CLK_RPU_V, "rpu_v", "rpu_v_div", 0x104, 6),
26 GATE(CLK_RPU_L, "rpu_l", "rpu_l_div", 0x104, 7),
27 GATE(CLK_RPU_SLEEP, "rpu_sleep", "rpu_sleep_div", 0x104, 8),
28 GATE(CLK_WIFI_PLL_GATE, "wifi_pll_gate", "wifi_pll_mux", 0x104, 9),
[all …]
/drivers/clk/zte/
Dclk-zx296718.c494 …GATE(CPU_DBG_GATE, "dbg_wclk", "dbg_mux", TOP_CLK_GATE0, 4, CLK_SET_RATE_PARENT, …
495 …GATE(A72_GATE, "a72_coreclk", "a72_mux", TOP_CLK_GATE0, 3, CLK_SET_RATE_PARENT, …
496 …GATE(CPU_PERI_GATE, "cpu_peri", "cpu_peri_mux", TOP_CLK_GATE0, 1, CLK_SET_RATE_PARENT, …
497 …GATE(A53_GATE, "a53_coreclk", "a53_mux", TOP_CLK_GATE0, 0, CLK_SET_RATE_PARENT, …
498 …GATE(SD1_WCLK, "sd1_wclk", "sd1_mux", TOP_CLK_GATE1, 13, CLK_SET_RATE_PARENT,…
499 …GATE(SD0_WCLK, "sd0_wclk", "sd0_mux", TOP_CLK_GATE1, 9, CLK_SET_RATE_PARENT, …
500 …GATE(EMMC_WCLK, "emmc_wclk", "emmc_mux_div2", TOP_CLK_GATE0, 5, CLK_SET_RATE_PARENT, …
501 …GATE(EMMC_NAND_AXI, "emmc_nand_aclk", "sys_noc_aclk", TOP_CLK_GATE1, 4, CLK_SET_RATE_PARENT, …
502 …GATE(NAND_WCLK, "nand_wclk", "nand_mux", TOP_CLK_GATE0, 1, CLK_SET_RATE_PARENT, …
503 …GATE(EMMC_NAND_AHB, "emmc_nand_hclk", "sys_noc_hclk", TOP_CLK_GATE1, 0, CLK_SET_RATE_PARENT, …
[all …]

12