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Searched refs:ISP_BASE__INST2_SEG0 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/
Dvega10_ip_offset.h677 #define ISP_BASE__INST2_SEG0 0 macro
Drenoir_ip_offset.h793 #define ISP_BASE__INST2_SEG0 0 macro