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Searched refs:MAX_CHANNELS (Results 1 – 23 of 23) sorted by relevance

/drivers/media/usb/s2255/
Ds2255drv.c69 #define MAX_CHANNELS 4 macro
248 struct s2255_vc vc[MAX_CHANNELS];
331 static unsigned long G_chnmap[MAX_CHANNELS] = {3, 2, 1, 0};
1599 for (i = 0; i < MAX_CHANNELS; i++) { in s2255_probe_v4l()
1676 if (atomic_read(&dev->num_channels) != MAX_CHANNELS) in s2255_probe_v4l()
1724 if (cc >= MAX_CHANNELS) { in save_frame()
1745 if (le32_to_cpu(pdword[1]) >= MAX_CHANNELS) in save_frame()
1748 if (cc >= MAX_CHANNELS) in save_frame()
1856 if (dev->cc >= MAX_CHANNELS) { in s2255_read_video_callback()
1996 for (j = 0; j < MAX_CHANNELS; j++) { in s2255_board_init()
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/drivers/scsi/
Da100u2w.h73 #define MAX_CHANNELS 2 macro
242 u32 allocation_map[MAX_CHANNELS][8]; /* Max STB is 256, So 256/32 */
Dmegaraid.h80 #define MAX_CHANNELS 5 macro
82 #define MAX_PHYSICAL_DRIVES MAX_CHANNELS*MAX_TARGET
388 u16 phys_drv_format[MAX_CHANNELS];
839 u8 logdrv_chan[MAX_CHANNELS+NVIRT_CHAN]; /* logical drive are on
Da100u2w.c483 for (i = 0; i < MAX_CHANNELS; i++) { in init_alloc_map()
Dmegaraid.c4393 for (i = NVIRT_CHAN; i < MAX_CHANNELS+NVIRT_CHAN; i++) in megaraid_probe_one()
/drivers/edac/
Di7300_edac.c64 #define MAX_CHANNELS (MAX_CH_PER_BRANCH * MAX_BRANCHES) macro
106 u16 ambpresent[MAX_CHANNELS]; /* AMB present regs */
109 struct i7300_dimm_info dimm_info[MAX_SLOTS][MAX_CHANNELS];
696 for (channel = 0; channel < MAX_CHANNELS; channel++) { in print_dimm_size()
717 for (channel = 0; channel < MAX_CHANNELS; channel++) { in print_dimm_size()
Di5400_edac.c54 #define MAX_CHANNELS (MAX_BRANCHES * CHANNELS_PER_BRANCH) macro
349 struct i5400_dimm_info dimm_info[DIMMS_PER_CHANNEL][MAX_CHANNELS];
1293 pvt->maxch = MAX_CHANNELS; in i5400_probe1()
Di5000_edac.c319 #define MAX_CHANNELS 6 /* max possible channels */ macro
350 struct i5000_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS];
/drivers/gpu/drm/radeon/
Ddce3_1_afmt.c97 value = MAX_CHANNELS(sad->channels) | in dce3_2_afmt_write_sad_regs()
Ddce6_afmt.c238 value = MAX_CHANNELS(sad->channels) | in dce6_afmt_write_sad_regs()
Devergreen_hdmi.c186 value = MAX_CHANNELS(sad->channels) | in evergreen_hdmi_write_sad_regs()
Drv770d.h886 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
Dsid.h722 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
Devergreend.h749 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
Dr600d.h1006 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
/drivers/most/
Dcore.c25 #define MAX_CHANNELS 64 macro
70 struct most_channel *channel[MAX_CHANNELS];
1286 !iface->poison_channel || (iface->num_channels > MAX_CHANNELS)) in most_register_interface()
/drivers/staging/octeon-usb/
Docteon-hcd.c219 #define MAX_CHANNELS 8 macro
341 } entry[MAX_CHANNELS + 1];
370 struct cvmx_usb_pipe *pipe_for_channel[MAX_CHANNELS];
1219 if (fifo->tail > MAX_CHANNELS) in cvmx_usb_fill_tx_hw()
1332 if (fifo->head > MAX_CHANNELS) in cvmx_usb_fill_tx_fifo()
/drivers/net/wan/
Dixp4xx_hss.c47 #define MAX_CHANNELS (FRAME_SIZE / 8) macro
377 for (ch = 0; ch < MAX_CHANNELS; ch++) { in hss_config_set_lut()
/drivers/gpu/drm/amd/display/dc/dce/
Ddce_audio.c553 MAX_CHANNELS); in dce_aud_az_configure()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h725 # define MAX_CHANNELS(x) (((x) & 0x7) << 0) macro
Ddce_v6_0.c1294 MAX_CHANNELS, sad->channels); in dce_v6_0_audio_write_sad_regs()
Ddce_v10_0.c1391 MAX_CHANNELS, sad->channels); in dce_v10_0_audio_write_sad_regs()
Ddce_v11_0.c1417 MAX_CHANNELS, sad->channels); in dce_v11_0_audio_write_sad_regs()