Searched refs:REG_DSI_10nm_PHY_PLL_DECIMAL_DIV_START_1 (Results 1 – 2 of 2) sorted by relevance
301 pll_write(base + REG_DSI_10nm_PHY_PLL_DECIMAL_DIV_START_1, in dsi_pll_commit()494 dec = pll_read(base + REG_DSI_10nm_PHY_PLL_DECIMAL_DIV_START_1); in dsi_pll_10nm_vco_recalc_rate()
1847 #define REG_DSI_10nm_PHY_PLL_DECIMAL_DIV_START_1 0x000000cc macro