Searched refs:REG_DSI_28nm_8960_PHY_PLL_CTRL_9 (Results 1 – 2 of 2) sorted by relevance
306 val = pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9); in dsi_pll_28nm_enable_seq()346 pll_read(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9); in dsi_pll_28nm_save_state()370 pll_write(base + REG_DSI_28nm_8960_PHY_PLL_CTRL_9, in dsi_pll_28nm_restore_state()446 bytediv->reg = pll_28nm->mmio + REG_DSI_28nm_8960_PHY_PLL_CTRL_9; in pll_28nm_register()
933 #define REG_DSI_28nm_8960_PHY_PLL_CTRL_9 0x00000024 macro