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Searched refs:REG_DSI_7nm_PHY_CMN_TIMING_CTRL_3 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_7nm.c179 dsi_phy_write(base + REG_DSI_7nm_PHY_CMN_TIMING_CTRL_3, timing->clk_trail); in dsi_7nm_phy_enable()
/drivers/gpu/drm/msm/dsi/
Ddsi.xml.h1939 #define REG_DSI_7nm_PHY_CMN_TIMING_CTRL_3 0x000000c0 macro