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Searched refs:bankwidth (Results 1 – 25 of 41) sorted by relevance

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/drivers/mtd/maps/
Dpcmciamtd.c46 static int bankwidth = 2; variable
66 module_param(bankwidth, int, 0);
67 MODULE_PARM_DESC(bankwidth, "Set bankwidth (1=8 bit, 2=16 bit, default=2)");
400 dev->pcmcia_map.bankwidth = t->geo[0].buswidth; in pcmciamtd_cistpl_geo()
437 if(!dev->pcmcia_map.bankwidth) in card_settings()
438 dev->pcmcia_map.bankwidth = 2; in card_settings()
445 if(bankwidth) { in card_settings()
446 dev->pcmcia_map.bankwidth = bankwidth; in card_settings()
447 pr_debug("bankwidth forced to %d\n", bankwidth); in card_settings()
458 dev->pcmcia_map.bankwidth << 3, dev->mtd_name); in card_settings()
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Dphysmap-gemini.c163 if (map->bankwidth != 2) in of_flash_probe_gemini()
165 map->bankwidth * 8); in of_flash_probe_gemini()
167 if (map->bankwidth != 1) in of_flash_probe_gemini()
169 map->bankwidth * 8); in of_flash_probe_gemini()
Ddc21285.c154 dc21285_map.bankwidth = 1; in init_dc21285()
160 dc21285_map.bankwidth = 2; in init_dc21285()
166 dc21285_map.bankwidth = 4; in init_dc21285()
176 dc21285_map.bankwidth*8); in init_dc21285()
Dsc520cdp.c76 .bankwidth = 4,
82 .bankwidth = 4,
88 .bankwidth = 1,
Damd76xrom.c210 for(map->map.bankwidth = 32; map->map.bankwidth; in amd76xrom_init_one()
211 map->map.bankwidth >>= 1) in amd76xrom_init_one()
215 if (!map_bankwidth_supported(map->map.bankwidth)) in amd76xrom_init_one()
Dsolutionengine.c25 .bankwidth = 4,
31 .bankwidth = 4,
Dichxrom.c237 for(map->map.bankwidth = 32; map->map.bankwidth; in ichxrom_init_one()
238 map->map.bankwidth >>= 1) in ichxrom_init_one()
242 if (!map_bankwidth_supported(map->map.bankwidth)) in ichxrom_init_one()
Dck804xrom.c240 for(map->map.bankwidth = 32; map->map.bankwidth; in ck804xrom_init_one()
241 map->map.bankwidth >>= 1) in ck804xrom_init_one()
245 if (!map_bankwidth_supported(map->map.bankwidth)) in ck804xrom_init_one()
Dimpa7.c35 .bankwidth = BUSWIDTH,
40 .bankwidth = BUSWIDTH,
Dsa1100-flash.c86 subdev->map.bankwidth = (MSC0 & MSC_RBW) ? 2 : 4; in sa1100_probe_subdev()
90 subdev->map.bankwidth = ((MSC0 >> 16) & MSC_RBW) ? 2 : 4; in sa1100_probe_subdev()
124 subdev->map.bankwidth * 8); in sa1100_probe_subdev()
Desb2rom.c302 for(map->map.bankwidth = 32; map->map.bankwidth; in esb2rom_init_one()
303 map->map.bankwidth >>= 1) { in esb2rom_init_one()
306 if (!map_bankwidth_supported(map->map.bankwidth)) in esb2rom_init_one()
Dpxa2xx-flash.c61 info->map.bankwidth = flash->width; in pxa2xx_flash_probe()
83 info->map.bankwidth * 8); in pxa2xx_flash_probe()
Dphysmap-core.c345 u32 bankwidth; in physmap_flash_of_init() local
360 err = of_property_read_u32(dp, "bank-width", &bankwidth); in physmap_flash_of_init()
374 info->maps[i].bankwidth = bankwidth; in physmap_flash_of_init()
447 info->maps[i].bankwidth = physmap_data->width; in physmap_flash_pdata_init()
Dplat-ram.c143 info->map.bankwidth = pdata->bankwidth; in platram_probe()
Dscx200_docflash.c172 scx200_docflash_map.bankwidth = 1; in init_scx200_docflash()
174 scx200_docflash_map.bankwidth = 2; in init_scx200_docflash()
Dmap_funcs.c35 BUG_ON(!map_bankwidth_supported(map->bankwidth)); in simple_map_init()
Dnettel.c70 .bankwidth = INTEL_BUSWIDTH,
108 .bankwidth = AMD_BUSWIDTH,
Dts5500_flash.c29 .bankwidth = 1,
Dpci.c92 map->map.bankwidth = 1; in intel_iq80310_init()
187 map->map.bankwidth = 4; in intel_dc21285_init()
Dnetsc520.c72 .bankwidth = 4,
Dcfi_flagadm.c61 .bankwidth = 2,
Duclinux.c81 mapp->bankwidth = 4; in uclinux_mtd_init()
Dtsunami_flash.c66 .bankwidth = 1,
/drivers/mtd/lpddr/
Dqinfo_probe.c48 int bankwidth = map_bankwidth(map) * 8; in lpddr_get_qinforec_pos() local
53 major = qinfo_array[i].major & ((1 << bankwidth) - 1); in lpddr_get_qinforec_pos()
54 minor = qinfo_array[i].minor & ((1 << bankwidth) - 1); in lpddr_get_qinforec_pos()
55 return minor | (major << bankwidth); in lpddr_get_qinforec_pos()
/drivers/media/pci/cobalt/
Dcobalt-flash.c20 .bankwidth = 2, /* 16 bits */
90 BUG_ON(!map_bankwidth_supported(map->bankwidth)); in cobalt_flash_probe()

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