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Searched refs:cache_size (Results 1 – 25 of 25) sorted by relevance

/drivers/misc/lkdtm/
Dusercopy.c22 static volatile size_t cache_size = 1024; variable
231 memset(buf, 'B', cache_size); in do_usercopy_heap_whitelist()
234 offset = (cache_size / 4) + unconst; in do_usercopy_heap_whitelist()
235 size = (cache_size / 16) + unconst; in do_usercopy_heap_whitelist()
343 kmem_cache_create_usercopy("lkdtm-usercopy", cache_size, in lkdtm_usercopy_init()
345 cache_size / 4, in lkdtm_usercopy_init()
346 cache_size / 16, in lkdtm_usercopy_init()
/drivers/mtd/
Dmtdblock.c30 unsigned int cache_size; member
88 mtdblk->cache_offset, mtdblk->cache_size); in write_cached_data()
91 mtdblk->cache_size, mtdblk->cache_data); in write_cached_data()
114 unsigned int sect_size = mtdblk->cache_size; in do_cached_write()
162 mtdblk->cache_size = sect_size; in do_cached_write()
184 unsigned int sect_size = mtdblk->cache_size; in do_cached_read()
241 if (unlikely(!mtdblk->cache_data && mtdblk->cache_size)) { in mtdblock_writesect()
269 mtdblk->cache_size = mbd->mtd->erasesize; in mtdblock_open()
/drivers/infiniband/hw/hfi1/
Duser_pages.c55 static unsigned long cache_size = 256; variable
56 module_param(cache_size, ulong, S_IRUGO | S_IWUSR);
57 MODULE_PARM_DESC(cache_size, "Send and receive side cache size limit (in MB)");
75 size = (cache_size * (1UL << 20)); /* convert to bytes */ in hfi1_can_pin_pages()
/drivers/md/
Ddm-cache-policy-smq.c799 dm_cblock_t cache_size; member
1113 clear_bitset(mq->cache_hit_bits, from_cblock(mq->cache_size)); in end_cache_period()
1133 return from_cblock(mq->cache_size) * p / 100u; in percent_to_target()
1159 nr_free = from_cblock(mq->cache_size) - mq->cache_alloc.nr_allocated; in free_target_met()
1726 __smq_create(dm_cblock_t cache_size, sector_t origin_size, sector_t cache_block_size, in __smq_create() argument
1738 mq->cache_size = cache_size; in __smq_create()
1741 calc_hotspot_params(origin_size, cache_block_size, from_cblock(cache_size), in __smq_create()
1746 if (space_init(&mq->es, total_sentinels + mq->nr_hotspot_blocks + from_cblock(cache_size))) { in __smq_create()
1764 total_sentinels + mq->nr_hotspot_blocks + from_cblock(cache_size)); in __smq_create()
1773 if (from_cblock(cache_size)) { in __smq_create()
[all …]
Ddm-cache-policy.c112 dm_cblock_t cache_size, in dm_cache_policy_create() argument
125 p = type->create(cache_size, origin_size, cache_block_size); in dm_cache_policy_create()
Ddm-cache-target.c402 dm_cblock_t cache_size; member
2373 cache->cache_size, in create_cache_policy()
2416 if (nr_blocks > (1 << 20) && cache->cache_size != size) in set_cache_size()
2422 cache->cache_size = size; in set_cache_size()
2476 dm_block_t cache_size = ca->cache_sectors; in cache_create() local
2479 cache_size = block_div(cache_size, ca->block_size); in cache_create()
2480 set_cache_size(cache, to_cblock(cache_size)); in cache_create()
2542 cache->dirty_bitset = alloc_bitset(from_cblock(cache->cache_size)); in cache_create()
2547 clear_bitset(cache->dirty_bitset, from_cblock(cache->cache_size)); in cache_create()
2741 r = dm_cache_set_dirty_bits(cache->cmd, from_cblock(cache->cache_size), cache->dirty_bitset); in write_dirty_bitset()
[all …]
Ddm-cache-policy.h176 struct dm_cache_policy *(*create)(dm_cblock_t cache_size,
Ddm-cache-policy-internal.h142 struct dm_cache_policy *dm_cache_policy_create(const char *name, dm_cblock_t cache_size,
/drivers/gpu/drm/amd/amdkfd/
Dkfd_crat.c53 uint32_t cache_size; member
65 .cache_size = 16,
75 .cache_size = 16,
84 .cache_size = 8,
99 .cache_size = 16,
108 .cache_size = 8,
117 .cache_size = 4,
320 props->cache_size = cache->cache_size; in kfd_parse_subtype_cache()
578 pcache->cache_size = pcache_info[cache_type].cache_size; in fill_in_pcache()
Dkfd_topology.h127 uint32_t cache_size; member
Dkfd_crat.h163 uint32_t cache_size; member
Dkfd_topology.c352 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size); in kfd_cache_show()
/drivers/block/null_blk/
Dnull_blk.h56 unsigned long cache_size; /* disk cache size in MB */ member
Dmain.c357 NULLB_DEVICE_ATTR(cache_size, ulong, NULL);
954 if ((nullb->dev->cache_size * 1024 * 1024) > in null_make_cache_space()
1105 nullb->dev->cache_size * 1024 * 1024); in null_handle_flush()
1764 dev->cache_size = 0; in null_validate_conf()
1765 dev->cache_size = min_t(unsigned long, ULONG_MAX / 1024 / 1024, in null_validate_conf()
1766 dev->cache_size); in null_validate_conf()
1868 if (dev->cache_size > 0) { in null_add_dev()
/drivers/base/
Dcacheinfo.c74 static void cache_size(struct cacheinfo *this_leaf, struct device_node *np) in cache_size() function
150 cache_size(this_leaf, np); in cache_of_set_props()
/drivers/acpi/numa/
Dhmat.c373 cache->memory_PD, cache->cache_size, attrs, in hmat_parse_cache()
386 tcache->cache_attrs.size = cache->cache_size; in hmat_parse_cache()
/drivers/net/ethernet/alteon/
Dacenic.c871 unsigned char cache_size; in ace_init() local
1007 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size); in ace_init()
1008 cache_size <<= 2; in ace_init()
1009 if (cache_size != SMP_CACHE_BYTES) { in ace_init()
1011 "(%i bytes) by BIOS/FW, ", cache_size); in ace_init()
1012 if (cache_size > SMP_CACHE_BYTES) in ace_init()
/drivers/atm/
Dhe.c981 u8 cache_size, timer; in he_start() local
1019 if (pci_read_config_byte(pci_dev, PCI_CACHE_LINE_SIZE, &cache_size)) { in he_start()
1024 if (cache_size < 16) { in he_start()
1025 cache_size = 16; in he_start()
1026 if (pci_write_config_byte(pci_dev, PCI_CACHE_LINE_SIZE, cache_size)) in he_start()
1027 hprintk("can't set cache line size to %d\n", cache_size); in he_start()
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v3_0.c1223 uint32_t offset, cache_size; in vcn_v3_0_start_sriov() local
1270 cache_size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4); in vcn_v3_0_start_sriov()
1291 offset = cache_size; in vcn_v3_0_start_sriov()
1299 cache_size); in vcn_v3_0_start_sriov()
/drivers/scsi/
Dmyrb.h256 unsigned int cache_size; /* Bytes 28-31 */ member
Dmyrs.c1415 static DEVICE_ATTR_RO(cache_size);
/drivers/mmc/core/
Dmmc.c587 card->ext_csd.cache_size = in mmc_decode_ext_csd()
1842 if (card->ext_csd.cache_size > 0) { in mmc_init_card()
2055 return host->card->ext_csd.cache_size > 0 && in _mmc_cache_enabled()
/drivers/media/platform/coda/
Dcoda-bit.c1010 u32 cache_size, cache_config; in coda9_set_frame_cache() local
1014 cache_size = 0x20262024; in coda9_set_frame_cache()
1018 cache_size = 0x02440243; in coda9_set_frame_cache()
1021 coda_write(ctx->dev, cache_size, CODA9_CMD_SET_FRAME_CACHE_SIZE); in coda9_set_frame_cache()
/drivers/fpga/
Ddfl-fme-main.c91 static DEVICE_ATTR_RO(cache_size);
/drivers/scsi/hisi_sas/
Dhisi_sas_main.c3108 u32 cache_size = HISI_SAS_IOST_ITCT_CACHE_DW_SZ * 4; in hisi_sas_debugfs_iost_cache_show() local
3122 hisi_sas_show_row_64(s, tab_idx, cache_size, iost); in hisi_sas_debugfs_iost_cache_show()
3175 u32 cache_size = HISI_SAS_IOST_ITCT_CACHE_DW_SZ * 4; in hisi_sas_debugfs_itct_cache_show() local
3189 hisi_sas_show_row_64(s, tab_idx, cache_size, itct); in hisi_sas_debugfs_itct_cache_show()