Home
last modified time | relevance | path

Searched refs:hena (Results 1 – 8 of 8) sorted by relevance

/drivers/video/fbdev/
Dpxa168fb.h376 #define CFG_INV_HENA(hena) ((hena) << 4) argument
/drivers/net/ethernet/intel/iavf/
Diavf_virtchnl.c831 vrh.hena = adapter->hena; in iavf_set_hena()
1496 adapter->hena = vrh->hena; in iavf_virtchnl_completion()
Diavf.h356 u64 hena; member
Diavf_main.c1323 adapter->hena = IAVF_DEFAULT_RSS_HENA_EXPANDED; in iavf_init_rss()
1325 adapter->hena = IAVF_DEFAULT_RSS_HENA; in iavf_init_rss()
1327 wr32(hw, IAVF_VFQF_HENA(0), (u32)adapter->hena); in iavf_init_rss()
1328 wr32(hw, IAVF_VFQF_HENA(1), (u32)(adapter->hena >> 32)); in iavf_init_rss()
/drivers/net/ethernet/intel/i40e/
Di40e_ethtool.c3465 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | in i40e_set_rss_hash_opt() local
3506 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); in i40e_set_rss_hash_opt()
3516 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); in i40e_set_rss_hash_opt()
3525 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); in i40e_set_rss_hash_opt()
3534 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); in i40e_set_rss_hash_opt()
3537 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | in i40e_set_rss_hash_opt()
3541 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | in i40e_set_rss_hash_opt()
3560 hena |= BIT_ULL(flow_id); in i40e_set_rss_hash_opt()
3564 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); in i40e_set_rss_hash_opt()
3565 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); in i40e_set_rss_hash_opt()
Di40e_virtchnl_pf.c764 u64 hena = i40e_pf_get_default_rss_hena(pf); in i40e_alloc_vsi_res() local
793 wr32(&pf->hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)hena); in i40e_alloc_vsi_res()
794 wr32(&pf->hw, I40E_VFQF_HENA1(1, vf->vf_id), (u32)(hena >> 32)); in i40e_alloc_vsi_res()
3298 vrh->hena = i40e_pf_get_default_rss_hena(pf); in i40e_vc_get_rss_hena()
3326 i40e_write_rx_ctl(hw, I40E_VFQF_HENA1(0, vf->vf_id), (u32)vrh->hena); in i40e_vc_set_rss_hena()
3328 (u32)(vrh->hena >> 32)); in i40e_vc_set_rss_hena()
Di40e_main.c11790 u64 hena; in i40e_pf_config_rss() local
11794 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | in i40e_pf_config_rss()
11796 hena |= i40e_pf_get_default_rss_hena(pf); in i40e_pf_config_rss()
11798 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); in i40e_pf_config_rss()
11799 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); in i40e_pf_config_rss()
/drivers/video/fbdev/mmp/hw/
Dmmp_ctrl.h606 #define CFG_INV_HENA(hena) ((hena)<<4) argument