Home
last modified time | relevance | path

Searched refs:ixDIDT_TD_CTRL_OCP (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_powertune.c164 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__UNUSED_0_MASK, DIDT_TD…
165 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__OCP_MAX_POWER_MASK, DIDT_TD…
306 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__UNUSED_0_MASK, DIDT_TD…
307 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__OCP_MAX_POWER_MASK, DIDT_TD…
448 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__UNUSED_0_MASK, DIDT_TD…
449 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__OCP_MAX_POWER_MASK, DIDT_TD…
592 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__UNUSED_0_MASK, DIDT_TD…
593 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__OCP_MAX_POWER_MASK, DIDT_TD…
776 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__UNUSED_0_MASK, DIDT_TD…
777 …{ ixDIDT_TD_CTRL_OCP, DIDT_TD_CTRL_OCP__OCP_MAX_POWER_MASK, DIDT_TD…
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_1_d.h2772 #define ixDIDT_TD_CTRL_OCP 0x43 macro
Dgfx_8_0_d.h2794 #define ixDIDT_TD_CTRL_OCP 0x43 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h11274 #define ixDIDT_TD_CTRL_OCP macro
Dgc_10_3_0_offset.h13408 #define ixDIDT_TD_CTRL_OCP macro