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Searched refs:mmRLC_GPM_UCODE_DATA (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h1267 #define mmRLC_GPM_UCODE_DATA 0x30e3 macro
Dgfx_7_2_d.h1280 #define mmRLC_GPM_UCODE_DATA 0x30e3 macro
Dgfx_8_1_d.h1378 #define mmRLC_GPM_UCODE_DATA 0xf83d macro
Dgfx_8_0_d.h1376 #define mmRLC_GPM_UCODE_DATA 0xf83d macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6759 #define mmRLC_GPM_UCODE_DATA … macro
Dgc_9_1_offset.h6983 #define mmRLC_GPM_UCODE_DATA … macro
Dgc_9_2_1_offset.h7021 #define mmRLC_GPM_UCODE_DATA … macro
Dgc_10_1_0_offset.h10433 #define mmRLC_GPM_UCODE_DATA … macro
Dgc_10_3_0_offset.h10053 #define mmRLC_GPM_UCODE_DATA … macro
/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c3555 WREG32(mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++)); in gfx_v7_0_rlc_resume()
Dgfx_v9_0.c3080 WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, le32_to_cpup(fw_data++)); in gfx_v9_0_rlc_load_microcode()
Dgfx_v10_0.c4953 WREG32_SOC15(GC, 0, mmRLC_GPM_UCODE_DATA, in gfx_v10_0_rlc_load_microcode()