Home
last modified time | relevance | path

Searched refs:mmUVD_JRBC_ENC_RB_CNTL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_offset.h181 #define mmUVD_JRBC_ENC_RB_CNTL … macro
Dvcn_2_0_0_offset.h166 #define mmUVD_JRBC_ENC_RB_CNTL … macro
Dvcn_3_0_0_offset.h379 #define mmUVD_JRBC_ENC_RB_CNTL … macro