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Searched refs:rtc_writel (Results 1 – 5 of 5) sorted by relevance

/drivers/rtc/
Drtc-lpc24xx.c60 #define rtc_writel(dev, reg, val) writel((val), (dev)->rtc_base + (reg)) macro
74 rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN); in lpc24xx_rtc_set_time()
76 rtc_writel(rtc, LPC24XX_SEC, tm->tm_sec); in lpc24xx_rtc_set_time()
77 rtc_writel(rtc, LPC24XX_MIN, tm->tm_min); in lpc24xx_rtc_set_time()
78 rtc_writel(rtc, LPC24XX_HOUR, tm->tm_hour); in lpc24xx_rtc_set_time()
79 rtc_writel(rtc, LPC24XX_DOW, tm->tm_wday); in lpc24xx_rtc_set_time()
80 rtc_writel(rtc, LPC24XX_DOM, tm->tm_mday); in lpc24xx_rtc_set_time()
81 rtc_writel(rtc, LPC24XX_DOY, tm->tm_yday); in lpc24xx_rtc_set_time()
82 rtc_writel(rtc, LPC24XX_MONTH, tm->tm_mon); in lpc24xx_rtc_set_time()
83 rtc_writel(rtc, LPC24XX_YEAR, tm->tm_year); in lpc24xx_rtc_set_time()
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Drtc-lpc32xx.c44 #define rtc_writel(dev, reg, val) \ macro
76 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp | LPC32XX_RTC_CTRL_CNTR_DIS); in lpc32xx_rtc_set_time()
77 rtc_writel(rtc, LPC32XX_RTC_UCOUNT, secs); in lpc32xx_rtc_set_time()
78 rtc_writel(rtc, LPC32XX_RTC_DCOUNT, 0xFFFFFFFF - secs); in lpc32xx_rtc_set_time()
79 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp &= ~LPC32XX_RTC_CTRL_CNTR_DIS); in lpc32xx_rtc_set_time()
112 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp & ~LPC32XX_RTC_CTRL_MATCH0); in lpc32xx_rtc_set_alarm()
114 rtc_writel(rtc, LPC32XX_RTC_MATCH0, alarmsecs); in lpc32xx_rtc_set_alarm()
118 rtc_writel(rtc, LPC32XX_RTC_INTSTAT, in lpc32xx_rtc_set_alarm()
120 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp | in lpc32xx_rtc_set_alarm()
146 rtc_writel(rtc, LPC32XX_RTC_CTRL, tmp); in lpc32xx_rtc_alarm_irq_enable()
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Drtc-fsl-ftm-alarm.c56 static inline void rtc_writel(struct ftm_rtc *dev, u32 reg, u32 val) in rtc_writel() function
72 rtc_writel(rtc, FTM_SC, val); in ftm_counter_enable()
82 rtc_writel(rtc, FTM_SC, val); in ftm_counter_disable()
111 rtc_writel(rtc, FTM_SC, rtc_readl(rtc, FTM_SC) & (~FTM_SC_TOF)); in ftm_irq_acknowledge()
120 rtc_writel(rtc, FTM_SC, val); in ftm_irq_enable()
129 rtc_writel(rtc, FTM_SC, val); in ftm_irq_disable()
139 rtc_writel(rtc, FTM_CNT, 0x00); in ftm_reset_counter()
146 rtc_writel(rtc, FTM_CNTIN, 0x00); in ftm_clean_alarm()
147 rtc_writel(rtc, FTM_MOD, ~0U); in ftm_clean_alarm()
231 rtc_writel(rtc, FTM_MOD, cycle - 1); in ftm_rtc_set_alarm()
Drtc-pxa.c73 #define rtc_writel(pxa_rtc, reg, value) \ macro
119 rtc_writel(pxa_rtc, RTSR, rtsr); in rtsr_clear_bits()
129 rtc_writel(pxa_rtc, RTSR, rtsr); in rtsr_set_bits()
142 rtc_writel(pxa_rtc, RTSR, rtsr); in pxa_rtc_irq()
162 rtc_writel(pxa_rtc, RTSR, rtsr & ~RTSR_TRIG_MASK); in pxa_rtc_irq()
239 rtc_writel(pxa_rtc, RYCR, ryxr_calc(tm)); in pxa_rtc_set_time()
240 rtc_writel(pxa_rtc, RDCR, rdxr_calc(tm)); in pxa_rtc_set_time()
267 rtc_writel(pxa_rtc, RYAR1, ryxr_calc(&alrm->time)); in pxa_rtc_set_alarm()
268 rtc_writel(pxa_rtc, RDAR1, rdxr_calc(&alrm->time)); in pxa_rtc_set_alarm()
275 rtc_writel(pxa_rtc, RTSR, rtsr); in pxa_rtc_set_alarm()
Drtc-omap.c170 static inline void rtc_writel(struct omap_rtc *rtc, unsigned int reg, u32 val) in rtc_writel() function
177 rtc_writel(rtc, OMAP_RTC_KICK0_REG, KICK0_VALUE); in am3352_rtc_unlock()
178 rtc_writel(rtc, OMAP_RTC_KICK1_REG, KICK1_VALUE); in am3352_rtc_unlock()
183 rtc_writel(rtc, OMAP_RTC_KICK0_REG, 0); in am3352_rtc_lock()
184 rtc_writel(rtc, OMAP_RTC_KICK1_REG, 0); in am3352_rtc_lock()
422 rtc_writel(rtc, OMAP_RTC_PMIC_REG, val | OMAP_RTC_PMIC_POWER_EN_EN); in omap_rtc_power_off_program()
426 rtc_writel(rtc, OMAP_RTC_STATUS_REG, OMAP_RTC_STATUS_ALARM2); in omap_rtc_power_off_program()
452 rtc_writel(rtc, OMAP_RTC_INTERRUPTS_REG, in omap_rtc_power_off_program()
494 rtc_writel(omap_rtc_power_off_rtc, OMAP_RTC_PMIC_REG, val); in omap_rtc_power_off()
663 rtc_writel(rtc, OMAP_RTC_PMIC_REG, val); in rtc_pinconf_set()
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