1 /*
2 * This file is provided under a dual BSD/GPLv2 license. When using or
3 * redistributing this file, you may do so under either license.
4 *
5 * GPL LICENSE SUMMARY
6 *
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * BSD LICENSE
25 *
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 *
33 * * Redistributions of source code must retain the above copyright
34 * notice, this list of conditions and the following disclaimer.
35 * * Redistributions in binary form must reproduce the above copyright
36 * notice, this list of conditions and the following disclaimer in
37 * the documentation and/or other materials provided with the
38 * distribution.
39 * * Neither the name of Intel Corporation nor the names of its
40 * contributors may be used to endorse or promote products derived
41 * from this software without specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56 #include "isci.h"
57 #include "port.h"
58 #include "request.h"
59
60 #define SCIC_SDS_PORT_HARD_RESET_TIMEOUT (1000)
61 #define SCU_DUMMY_INDEX (0xFFFF)
62
63 #undef C
64 #define C(a) (#a)
port_state_name(enum sci_port_states state)65 const char *port_state_name(enum sci_port_states state)
66 {
67 static const char * const strings[] = PORT_STATES;
68
69 return strings[state];
70 }
71 #undef C
72
sciport_to_dev(struct isci_port * iport)73 static struct device *sciport_to_dev(struct isci_port *iport)
74 {
75 int i = iport->physical_port_index;
76 struct isci_port *table;
77 struct isci_host *ihost;
78
79 if (i == SCIC_SDS_DUMMY_PORT)
80 i = SCI_MAX_PORTS+1;
81
82 table = iport - i;
83 ihost = container_of(table, typeof(*ihost), ports[0]);
84
85 return &ihost->pdev->dev;
86 }
87
sci_port_get_protocols(struct isci_port * iport,struct sci_phy_proto * proto)88 static void sci_port_get_protocols(struct isci_port *iport, struct sci_phy_proto *proto)
89 {
90 u8 index;
91
92 proto->all = 0;
93 for (index = 0; index < SCI_MAX_PHYS; index++) {
94 struct isci_phy *iphy = iport->phy_table[index];
95
96 if (!iphy)
97 continue;
98 sci_phy_get_protocols(iphy, proto);
99 }
100 }
101
sci_port_get_phys(struct isci_port * iport)102 static u32 sci_port_get_phys(struct isci_port *iport)
103 {
104 u32 index;
105 u32 mask;
106
107 mask = 0;
108 for (index = 0; index < SCI_MAX_PHYS; index++)
109 if (iport->phy_table[index])
110 mask |= (1 << index);
111
112 return mask;
113 }
114
115 /**
116 * sci_port_get_properties() - This method simply returns the properties
117 * regarding the port, such as: physical index, protocols, sas address, etc.
118 * @port: this parameter specifies the port for which to retrieve the physical
119 * index.
120 * @properties: This parameter specifies the properties structure into which to
121 * copy the requested information.
122 *
123 * Indicate if the user specified a valid port. SCI_SUCCESS This value is
124 * returned if the specified port was valid. SCI_FAILURE_INVALID_PORT This
125 * value is returned if the specified port is not valid. When this value is
126 * returned, no data is copied to the properties output parameter.
127 */
sci_port_get_properties(struct isci_port * iport,struct sci_port_properties * prop)128 enum sci_status sci_port_get_properties(struct isci_port *iport,
129 struct sci_port_properties *prop)
130 {
131 if (!iport || iport->logical_port_index == SCIC_SDS_DUMMY_PORT)
132 return SCI_FAILURE_INVALID_PORT;
133
134 prop->index = iport->logical_port_index;
135 prop->phy_mask = sci_port_get_phys(iport);
136 sci_port_get_sas_address(iport, &prop->local.sas_address);
137 sci_port_get_protocols(iport, &prop->local.protocols);
138 sci_port_get_attached_sas_address(iport, &prop->remote.sas_address);
139
140 return SCI_SUCCESS;
141 }
142
sci_port_bcn_enable(struct isci_port * iport)143 static void sci_port_bcn_enable(struct isci_port *iport)
144 {
145 struct isci_phy *iphy;
146 u32 val;
147 int i;
148
149 for (i = 0; i < ARRAY_SIZE(iport->phy_table); i++) {
150 iphy = iport->phy_table[i];
151 if (!iphy)
152 continue;
153 val = readl(&iphy->link_layer_registers->link_layer_control);
154 /* clear the bit by writing 1. */
155 writel(val, &iphy->link_layer_registers->link_layer_control);
156 }
157 }
158
isci_port_bc_change_received(struct isci_host * ihost,struct isci_port * iport,struct isci_phy * iphy)159 static void isci_port_bc_change_received(struct isci_host *ihost,
160 struct isci_port *iport,
161 struct isci_phy *iphy)
162 {
163 dev_dbg(&ihost->pdev->dev,
164 "%s: isci_phy = %p, sas_phy = %p\n",
165 __func__, iphy, &iphy->sas_phy);
166
167 sas_notify_port_event_gfp(&iphy->sas_phy,
168 PORTE_BROADCAST_RCVD, GFP_ATOMIC);
169 sci_port_bcn_enable(iport);
170 }
171
isci_port_link_up(struct isci_host * isci_host,struct isci_port * iport,struct isci_phy * iphy)172 static void isci_port_link_up(struct isci_host *isci_host,
173 struct isci_port *iport,
174 struct isci_phy *iphy)
175 {
176 unsigned long flags;
177 struct sci_port_properties properties;
178 unsigned long success = true;
179
180 dev_dbg(&isci_host->pdev->dev,
181 "%s: isci_port = %p\n",
182 __func__, iport);
183
184 spin_lock_irqsave(&iphy->sas_phy.frame_rcvd_lock, flags);
185
186 sci_port_get_properties(iport, &properties);
187
188 if (iphy->protocol == SAS_PROTOCOL_SATA) {
189 u64 attached_sas_address;
190
191 iphy->sas_phy.oob_mode = SATA_OOB_MODE;
192 iphy->sas_phy.frame_rcvd_size = sizeof(struct dev_to_host_fis);
193
194 /*
195 * For direct-attached SATA devices, the SCI core will
196 * automagically assign a SAS address to the end device
197 * for the purpose of creating a port. This SAS address
198 * will not be the same as assigned to the PHY and needs
199 * to be obtained from struct sci_port_properties properties.
200 */
201 attached_sas_address = properties.remote.sas_address.high;
202 attached_sas_address <<= 32;
203 attached_sas_address |= properties.remote.sas_address.low;
204 swab64s(&attached_sas_address);
205
206 memcpy(&iphy->sas_phy.attached_sas_addr,
207 &attached_sas_address, sizeof(attached_sas_address));
208 } else if (iphy->protocol == SAS_PROTOCOL_SSP) {
209 iphy->sas_phy.oob_mode = SAS_OOB_MODE;
210 iphy->sas_phy.frame_rcvd_size = sizeof(struct sas_identify_frame);
211
212 /* Copy the attached SAS address from the IAF */
213 memcpy(iphy->sas_phy.attached_sas_addr,
214 iphy->frame_rcvd.iaf.sas_addr, SAS_ADDR_SIZE);
215 } else {
216 dev_err(&isci_host->pdev->dev, "%s: unknown target\n", __func__);
217 success = false;
218 }
219
220 iphy->sas_phy.phy->negotiated_linkrate = sci_phy_linkrate(iphy);
221
222 spin_unlock_irqrestore(&iphy->sas_phy.frame_rcvd_lock, flags);
223
224 /* Notify libsas that we have an address frame, if indeed
225 * we've found an SSP, SMP, or STP target */
226 if (success)
227 sas_notify_port_event_gfp(&iphy->sas_phy,
228 PORTE_BYTES_DMAED, GFP_ATOMIC);
229 }
230
231
232 /**
233 * isci_port_link_down() - This function is called by the sci core when a link
234 * becomes inactive.
235 * @isci_host: This parameter specifies the isci host object.
236 * @phy: This parameter specifies the isci phy with the active link.
237 * @port: This parameter specifies the isci port with the active link.
238 *
239 */
isci_port_link_down(struct isci_host * isci_host,struct isci_phy * isci_phy,struct isci_port * isci_port)240 static void isci_port_link_down(struct isci_host *isci_host,
241 struct isci_phy *isci_phy,
242 struct isci_port *isci_port)
243 {
244 struct isci_remote_device *isci_device;
245
246 dev_dbg(&isci_host->pdev->dev,
247 "%s: isci_port = %p\n", __func__, isci_port);
248
249 if (isci_port) {
250
251 /* check to see if this is the last phy on this port. */
252 if (isci_phy->sas_phy.port &&
253 isci_phy->sas_phy.port->num_phys == 1) {
254 /* change the state for all devices on this port. The
255 * next task sent to this device will be returned as
256 * SAS_TASK_UNDELIVERED, and the scsi mid layer will
257 * remove the target
258 */
259 list_for_each_entry(isci_device,
260 &isci_port->remote_dev_list,
261 node) {
262 dev_dbg(&isci_host->pdev->dev,
263 "%s: isci_device = %p\n",
264 __func__, isci_device);
265 set_bit(IDEV_GONE, &isci_device->flags);
266 }
267 }
268 }
269
270 /* Notify libsas of the borken link, this will trigger calls to our
271 * isci_port_deformed and isci_dev_gone functions.
272 */
273 sas_phy_disconnected(&isci_phy->sas_phy);
274 sas_notify_phy_event_gfp(&isci_phy->sas_phy,
275 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);
276
277 dev_dbg(&isci_host->pdev->dev,
278 "%s: isci_port = %p - Done\n", __func__, isci_port);
279 }
280
is_port_ready_state(enum sci_port_states state)281 static bool is_port_ready_state(enum sci_port_states state)
282 {
283 switch (state) {
284 case SCI_PORT_READY:
285 case SCI_PORT_SUB_WAITING:
286 case SCI_PORT_SUB_OPERATIONAL:
287 case SCI_PORT_SUB_CONFIGURING:
288 return true;
289 default:
290 return false;
291 }
292 }
293
294 /* flag dummy rnc hanling when exiting a ready state */
port_state_machine_change(struct isci_port * iport,enum sci_port_states state)295 static void port_state_machine_change(struct isci_port *iport,
296 enum sci_port_states state)
297 {
298 struct sci_base_state_machine *sm = &iport->sm;
299 enum sci_port_states old_state = sm->current_state_id;
300
301 if (is_port_ready_state(old_state) && !is_port_ready_state(state))
302 iport->ready_exit = true;
303
304 sci_change_state(sm, state);
305 iport->ready_exit = false;
306 }
307
308 /**
309 * isci_port_hard_reset_complete() - This function is called by the sci core
310 * when the hard reset complete notification has been received.
311 * @port: This parameter specifies the sci port with the active link.
312 * @completion_status: This parameter specifies the core status for the reset
313 * process.
314 *
315 */
isci_port_hard_reset_complete(struct isci_port * isci_port,enum sci_status completion_status)316 static void isci_port_hard_reset_complete(struct isci_port *isci_port,
317 enum sci_status completion_status)
318 {
319 struct isci_host *ihost = isci_port->owning_controller;
320
321 dev_dbg(&ihost->pdev->dev,
322 "%s: isci_port = %p, completion_status=%x\n",
323 __func__, isci_port, completion_status);
324
325 /* Save the status of the hard reset from the port. */
326 isci_port->hard_reset_status = completion_status;
327
328 if (completion_status != SCI_SUCCESS) {
329
330 /* The reset failed. The port state is now SCI_PORT_FAILED. */
331 if (isci_port->active_phy_mask == 0) {
332 int phy_idx = isci_port->last_active_phy;
333 struct isci_phy *iphy = &ihost->phys[phy_idx];
334
335 /* Generate the link down now to the host, since it
336 * was intercepted by the hard reset state machine when
337 * it really happened.
338 */
339 isci_port_link_down(ihost, iphy, isci_port);
340 }
341 /* Advance the port state so that link state changes will be
342 * noticed.
343 */
344 port_state_machine_change(isci_port, SCI_PORT_SUB_WAITING);
345
346 }
347 clear_bit(IPORT_RESET_PENDING, &isci_port->state);
348 wake_up(&ihost->eventq);
349
350 }
351
352 /* This method will return a true value if the specified phy can be assigned to
353 * this port The following is a list of phys for each port that are allowed: -
354 * Port 0 - 3 2 1 0 - Port 1 - 1 - Port 2 - 3 2 - Port 3 - 3 This method
355 * doesn't preclude all configurations. It merely ensures that a phy is part
356 * of the allowable set of phy identifiers for that port. For example, one
357 * could assign phy 3 to port 0 and no other phys. Please refer to
358 * sci_port_is_phy_mask_valid() for information regarding whether the
359 * phy_mask for a port can be supported. bool true if this is a valid phy
360 * assignment for the port false if this is not a valid phy assignment for the
361 * port
362 */
sci_port_is_valid_phy_assignment(struct isci_port * iport,u32 phy_index)363 bool sci_port_is_valid_phy_assignment(struct isci_port *iport, u32 phy_index)
364 {
365 struct isci_host *ihost = iport->owning_controller;
366 struct sci_user_parameters *user = &ihost->user_parameters;
367
368 /* Initialize to invalid value. */
369 u32 existing_phy_index = SCI_MAX_PHYS;
370 u32 index;
371
372 if ((iport->physical_port_index == 1) && (phy_index != 1))
373 return false;
374
375 if (iport->physical_port_index == 3 && phy_index != 3)
376 return false;
377
378 if (iport->physical_port_index == 2 &&
379 (phy_index == 0 || phy_index == 1))
380 return false;
381
382 for (index = 0; index < SCI_MAX_PHYS; index++)
383 if (iport->phy_table[index] && index != phy_index)
384 existing_phy_index = index;
385
386 /* Ensure that all of the phys in the port are capable of
387 * operating at the same maximum link rate.
388 */
389 if (existing_phy_index < SCI_MAX_PHYS &&
390 user->phys[phy_index].max_speed_generation !=
391 user->phys[existing_phy_index].max_speed_generation)
392 return false;
393
394 return true;
395 }
396
397 /**
398 *
399 * @sci_port: This is the port object for which to determine if the phy mask
400 * can be supported.
401 *
402 * This method will return a true value if the port's phy mask can be supported
403 * by the SCU. The following is a list of valid PHY mask configurations for
404 * each port: - Port 0 - [[3 2] 1] 0 - Port 1 - [1] - Port 2 - [[3] 2]
405 * - Port 3 - [3] This method returns a boolean indication specifying if the
406 * phy mask can be supported. true if this is a valid phy assignment for the
407 * port false if this is not a valid phy assignment for the port
408 */
sci_port_is_phy_mask_valid(struct isci_port * iport,u32 phy_mask)409 static bool sci_port_is_phy_mask_valid(
410 struct isci_port *iport,
411 u32 phy_mask)
412 {
413 if (iport->physical_port_index == 0) {
414 if (((phy_mask & 0x0F) == 0x0F)
415 || ((phy_mask & 0x03) == 0x03)
416 || ((phy_mask & 0x01) == 0x01)
417 || (phy_mask == 0))
418 return true;
419 } else if (iport->physical_port_index == 1) {
420 if (((phy_mask & 0x02) == 0x02)
421 || (phy_mask == 0))
422 return true;
423 } else if (iport->physical_port_index == 2) {
424 if (((phy_mask & 0x0C) == 0x0C)
425 || ((phy_mask & 0x04) == 0x04)
426 || (phy_mask == 0))
427 return true;
428 } else if (iport->physical_port_index == 3) {
429 if (((phy_mask & 0x08) == 0x08)
430 || (phy_mask == 0))
431 return true;
432 }
433
434 return false;
435 }
436
437 /*
438 * This method retrieves a currently active (i.e. connected) phy contained in
439 * the port. Currently, the lowest order phy that is connected is returned.
440 * This method returns a pointer to a SCIS_SDS_PHY object. NULL This value is
441 * returned if there are no currently active (i.e. connected to a remote end
442 * point) phys contained in the port. All other values specify a struct sci_phy
443 * object that is active in the port.
444 */
sci_port_get_a_connected_phy(struct isci_port * iport)445 static struct isci_phy *sci_port_get_a_connected_phy(struct isci_port *iport)
446 {
447 u32 index;
448 struct isci_phy *iphy;
449
450 for (index = 0; index < SCI_MAX_PHYS; index++) {
451 /* Ensure that the phy is both part of the port and currently
452 * connected to the remote end-point.
453 */
454 iphy = iport->phy_table[index];
455 if (iphy && sci_port_active_phy(iport, iphy))
456 return iphy;
457 }
458
459 return NULL;
460 }
461
sci_port_set_phy(struct isci_port * iport,struct isci_phy * iphy)462 static enum sci_status sci_port_set_phy(struct isci_port *iport, struct isci_phy *iphy)
463 {
464 /* Check to see if we can add this phy to a port
465 * that means that the phy is not part of a port and that the port does
466 * not already have a phy assinged to the phy index.
467 */
468 if (!iport->phy_table[iphy->phy_index] &&
469 !phy_get_non_dummy_port(iphy) &&
470 sci_port_is_valid_phy_assignment(iport, iphy->phy_index)) {
471 /* Phy is being added in the stopped state so we are in MPC mode
472 * make logical port index = physical port index
473 */
474 iport->logical_port_index = iport->physical_port_index;
475 iport->phy_table[iphy->phy_index] = iphy;
476 sci_phy_set_port(iphy, iport);
477
478 return SCI_SUCCESS;
479 }
480
481 return SCI_FAILURE;
482 }
483
sci_port_clear_phy(struct isci_port * iport,struct isci_phy * iphy)484 static enum sci_status sci_port_clear_phy(struct isci_port *iport, struct isci_phy *iphy)
485 {
486 /* Make sure that this phy is part of this port */
487 if (iport->phy_table[iphy->phy_index] == iphy &&
488 phy_get_non_dummy_port(iphy) == iport) {
489 struct isci_host *ihost = iport->owning_controller;
490
491 /* Yep it is assigned to this port so remove it */
492 sci_phy_set_port(iphy, &ihost->ports[SCI_MAX_PORTS]);
493 iport->phy_table[iphy->phy_index] = NULL;
494 return SCI_SUCCESS;
495 }
496
497 return SCI_FAILURE;
498 }
499
sci_port_get_sas_address(struct isci_port * iport,struct sci_sas_address * sas)500 void sci_port_get_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
501 {
502 u32 index;
503
504 sas->high = 0;
505 sas->low = 0;
506 for (index = 0; index < SCI_MAX_PHYS; index++)
507 if (iport->phy_table[index])
508 sci_phy_get_sas_address(iport->phy_table[index], sas);
509 }
510
sci_port_get_attached_sas_address(struct isci_port * iport,struct sci_sas_address * sas)511 void sci_port_get_attached_sas_address(struct isci_port *iport, struct sci_sas_address *sas)
512 {
513 struct isci_phy *iphy;
514
515 /*
516 * Ensure that the phy is both part of the port and currently
517 * connected to the remote end-point.
518 */
519 iphy = sci_port_get_a_connected_phy(iport);
520 if (iphy) {
521 if (iphy->protocol != SAS_PROTOCOL_SATA) {
522 sci_phy_get_attached_sas_address(iphy, sas);
523 } else {
524 sci_phy_get_sas_address(iphy, sas);
525 sas->low += iphy->phy_index;
526 }
527 } else {
528 sas->high = 0;
529 sas->low = 0;
530 }
531 }
532
533 /**
534 * sci_port_construct_dummy_rnc() - create dummy rnc for si workaround
535 *
536 * @sci_port: logical port on which we need to create the remote node context
537 * @rni: remote node index for this remote node context.
538 *
539 * This routine will construct a dummy remote node context data structure
540 * This structure will be posted to the hardware to work around a scheduler
541 * error in the hardware.
542 */
sci_port_construct_dummy_rnc(struct isci_port * iport,u16 rni)543 static void sci_port_construct_dummy_rnc(struct isci_port *iport, u16 rni)
544 {
545 union scu_remote_node_context *rnc;
546
547 rnc = &iport->owning_controller->remote_node_context_table[rni];
548
549 memset(rnc, 0, sizeof(union scu_remote_node_context));
550
551 rnc->ssp.remote_sas_address_hi = 0;
552 rnc->ssp.remote_sas_address_lo = 0;
553
554 rnc->ssp.remote_node_index = rni;
555 rnc->ssp.remote_node_port_width = 1;
556 rnc->ssp.logical_port_index = iport->physical_port_index;
557
558 rnc->ssp.nexus_loss_timer_enable = false;
559 rnc->ssp.check_bit = false;
560 rnc->ssp.is_valid = true;
561 rnc->ssp.is_remote_node_context = true;
562 rnc->ssp.function_number = 0;
563 rnc->ssp.arbitration_wait_time = 0;
564 }
565
566 /*
567 * construct a dummy task context data structure. This
568 * structure will be posted to the hardwre to work around a scheduler error
569 * in the hardware.
570 */
sci_port_construct_dummy_task(struct isci_port * iport,u16 tag)571 static void sci_port_construct_dummy_task(struct isci_port *iport, u16 tag)
572 {
573 struct isci_host *ihost = iport->owning_controller;
574 struct scu_task_context *task_context;
575
576 task_context = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
577 memset(task_context, 0, sizeof(struct scu_task_context));
578
579 task_context->initiator_request = 1;
580 task_context->connection_rate = 1;
581 task_context->logical_port_index = iport->physical_port_index;
582 task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP;
583 task_context->task_index = ISCI_TAG_TCI(tag);
584 task_context->valid = SCU_TASK_CONTEXT_VALID;
585 task_context->context_type = SCU_TASK_CONTEXT_TYPE;
586 task_context->remote_node_index = iport->reserved_rni;
587 task_context->do_not_dma_ssp_good_response = 1;
588 task_context->task_phase = 0x01;
589 }
590
sci_port_destroy_dummy_resources(struct isci_port * iport)591 static void sci_port_destroy_dummy_resources(struct isci_port *iport)
592 {
593 struct isci_host *ihost = iport->owning_controller;
594
595 if (iport->reserved_tag != SCI_CONTROLLER_INVALID_IO_TAG)
596 isci_free_tag(ihost, iport->reserved_tag);
597
598 if (iport->reserved_rni != SCU_DUMMY_INDEX)
599 sci_remote_node_table_release_remote_node_index(&ihost->available_remote_nodes,
600 1, iport->reserved_rni);
601
602 iport->reserved_rni = SCU_DUMMY_INDEX;
603 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
604 }
605
sci_port_setup_transports(struct isci_port * iport,u32 device_id)606 void sci_port_setup_transports(struct isci_port *iport, u32 device_id)
607 {
608 u8 index;
609
610 for (index = 0; index < SCI_MAX_PHYS; index++) {
611 if (iport->active_phy_mask & (1 << index))
612 sci_phy_setup_transport(iport->phy_table[index], device_id);
613 }
614 }
615
sci_port_resume_phy(struct isci_port * iport,struct isci_phy * iphy)616 static void sci_port_resume_phy(struct isci_port *iport, struct isci_phy *iphy)
617 {
618 sci_phy_resume(iphy);
619 iport->enabled_phy_mask |= 1 << iphy->phy_index;
620 }
621
sci_port_activate_phy(struct isci_port * iport,struct isci_phy * iphy,u8 flags)622 static void sci_port_activate_phy(struct isci_port *iport,
623 struct isci_phy *iphy,
624 u8 flags)
625 {
626 struct isci_host *ihost = iport->owning_controller;
627
628 if (iphy->protocol != SAS_PROTOCOL_SATA && (flags & PF_RESUME))
629 sci_phy_resume(iphy);
630
631 iport->active_phy_mask |= 1 << iphy->phy_index;
632
633 sci_controller_clear_invalid_phy(ihost, iphy);
634
635 if (flags & PF_NOTIFY)
636 isci_port_link_up(ihost, iport, iphy);
637 }
638
sci_port_deactivate_phy(struct isci_port * iport,struct isci_phy * iphy,bool do_notify_user)639 void sci_port_deactivate_phy(struct isci_port *iport, struct isci_phy *iphy,
640 bool do_notify_user)
641 {
642 struct isci_host *ihost = iport->owning_controller;
643
644 iport->active_phy_mask &= ~(1 << iphy->phy_index);
645 iport->enabled_phy_mask &= ~(1 << iphy->phy_index);
646 if (!iport->active_phy_mask)
647 iport->last_active_phy = iphy->phy_index;
648
649 iphy->max_negotiated_speed = SAS_LINK_RATE_UNKNOWN;
650
651 /* Re-assign the phy back to the LP as if it were a narrow port for APC
652 * mode. For MPC mode, the phy will remain in the port.
653 */
654 if (iport->owning_controller->oem_parameters.controller.mode_type ==
655 SCIC_PORT_AUTOMATIC_CONFIGURATION_MODE)
656 writel(iphy->phy_index,
657 &iport->port_pe_configuration_register[iphy->phy_index]);
658
659 if (do_notify_user == true)
660 isci_port_link_down(ihost, iphy, iport);
661 }
662
sci_port_invalid_link_up(struct isci_port * iport,struct isci_phy * iphy)663 static void sci_port_invalid_link_up(struct isci_port *iport, struct isci_phy *iphy)
664 {
665 struct isci_host *ihost = iport->owning_controller;
666
667 /*
668 * Check to see if we have alreay reported this link as bad and if
669 * not go ahead and tell the SCI_USER that we have discovered an
670 * invalid link.
671 */
672 if ((ihost->invalid_phy_mask & (1 << iphy->phy_index)) == 0) {
673 ihost->invalid_phy_mask |= 1 << iphy->phy_index;
674 dev_warn(&ihost->pdev->dev, "Invalid link up!\n");
675 }
676 }
677
678 /**
679 * sci_port_general_link_up_handler - phy can be assigned to port?
680 * @sci_port: sci_port object for which has a phy that has gone link up.
681 * @sci_phy: This is the struct isci_phy object that has gone link up.
682 * @flags: PF_RESUME, PF_NOTIFY to sci_port_activate_phy
683 *
684 * Determine if this phy can be assigned to this port . If the phy is
685 * not a valid PHY for this port then the function will notify the user.
686 * A PHY can only be part of a port if it's attached SAS ADDRESS is the
687 * same as all other PHYs in the same port.
688 */
sci_port_general_link_up_handler(struct isci_port * iport,struct isci_phy * iphy,u8 flags)689 static void sci_port_general_link_up_handler(struct isci_port *iport,
690 struct isci_phy *iphy,
691 u8 flags)
692 {
693 struct sci_sas_address port_sas_address;
694 struct sci_sas_address phy_sas_address;
695
696 sci_port_get_attached_sas_address(iport, &port_sas_address);
697 sci_phy_get_attached_sas_address(iphy, &phy_sas_address);
698
699 /* If the SAS address of the new phy matches the SAS address of
700 * other phys in the port OR this is the first phy in the port,
701 * then activate the phy and allow it to be used for operations
702 * in this port.
703 */
704 if ((phy_sas_address.high == port_sas_address.high &&
705 phy_sas_address.low == port_sas_address.low) ||
706 iport->active_phy_mask == 0) {
707 struct sci_base_state_machine *sm = &iport->sm;
708
709 sci_port_activate_phy(iport, iphy, flags);
710 if (sm->current_state_id == SCI_PORT_RESETTING)
711 port_state_machine_change(iport, SCI_PORT_READY);
712 } else
713 sci_port_invalid_link_up(iport, iphy);
714 }
715
716
717
718 /**
719 * This method returns false if the port only has a single phy object assigned.
720 * If there are no phys or more than one phy then the method will return
721 * true.
722 * @sci_port: The port for which the wide port condition is to be checked.
723 *
724 * bool true Is returned if this is a wide ported port. false Is returned if
725 * this is a narrow port.
726 */
sci_port_is_wide(struct isci_port * iport)727 static bool sci_port_is_wide(struct isci_port *iport)
728 {
729 u32 index;
730 u32 phy_count = 0;
731
732 for (index = 0; index < SCI_MAX_PHYS; index++) {
733 if (iport->phy_table[index] != NULL) {
734 phy_count++;
735 }
736 }
737
738 return phy_count != 1;
739 }
740
741 /**
742 * This method is called by the PHY object when the link is detected. if the
743 * port wants the PHY to continue on to the link up state then the port
744 * layer must return true. If the port object returns false the phy object
745 * must halt its attempt to go link up.
746 * @sci_port: The port associated with the phy object.
747 * @sci_phy: The phy object that is trying to go link up.
748 *
749 * true if the phy object can continue to the link up condition. true Is
750 * returned if this phy can continue to the ready state. false Is returned if
751 * can not continue on to the ready state. This notification is in place for
752 * wide ports and direct attached phys. Since there are no wide ported SATA
753 * devices this could become an invalid port configuration.
754 */
sci_port_link_detected(struct isci_port * iport,struct isci_phy * iphy)755 bool sci_port_link_detected(struct isci_port *iport, struct isci_phy *iphy)
756 {
757 if ((iport->logical_port_index != SCIC_SDS_DUMMY_PORT) &&
758 (iphy->protocol == SAS_PROTOCOL_SATA)) {
759 if (sci_port_is_wide(iport)) {
760 sci_port_invalid_link_up(iport, iphy);
761 return false;
762 } else {
763 struct isci_host *ihost = iport->owning_controller;
764 struct isci_port *dst_port = &(ihost->ports[iphy->phy_index]);
765 writel(iphy->phy_index,
766 &dst_port->port_pe_configuration_register[iphy->phy_index]);
767 }
768 }
769
770 return true;
771 }
772
port_timeout(struct timer_list * t)773 static void port_timeout(struct timer_list *t)
774 {
775 struct sci_timer *tmr = from_timer(tmr, t, timer);
776 struct isci_port *iport = container_of(tmr, typeof(*iport), timer);
777 struct isci_host *ihost = iport->owning_controller;
778 unsigned long flags;
779 u32 current_state;
780
781 spin_lock_irqsave(&ihost->scic_lock, flags);
782
783 if (tmr->cancel)
784 goto done;
785
786 current_state = iport->sm.current_state_id;
787
788 if (current_state == SCI_PORT_RESETTING) {
789 /* if the port is still in the resetting state then the timeout
790 * fired before the reset completed.
791 */
792 port_state_machine_change(iport, SCI_PORT_FAILED);
793 } else if (current_state == SCI_PORT_STOPPED) {
794 /* if the port is stopped then the start request failed In this
795 * case stay in the stopped state.
796 */
797 dev_err(sciport_to_dev(iport),
798 "%s: SCIC Port 0x%p failed to stop before timeout.\n",
799 __func__,
800 iport);
801 } else if (current_state == SCI_PORT_STOPPING) {
802 dev_dbg(sciport_to_dev(iport),
803 "%s: port%d: stop complete timeout\n",
804 __func__, iport->physical_port_index);
805 } else {
806 /* The port is in the ready state and we have a timer
807 * reporting a timeout this should not happen.
808 */
809 dev_err(sciport_to_dev(iport),
810 "%s: SCIC Port 0x%p is processing a timeout operation "
811 "in state %d.\n", __func__, iport, current_state);
812 }
813
814 done:
815 spin_unlock_irqrestore(&ihost->scic_lock, flags);
816 }
817
818 /* --------------------------------------------------------------------------- */
819
820 /**
821 * This function updates the hardwares VIIT entry for this port.
822 *
823 *
824 */
sci_port_update_viit_entry(struct isci_port * iport)825 static void sci_port_update_viit_entry(struct isci_port *iport)
826 {
827 struct sci_sas_address sas_address;
828
829 sci_port_get_sas_address(iport, &sas_address);
830
831 writel(sas_address.high,
832 &iport->viit_registers->initiator_sas_address_hi);
833 writel(sas_address.low,
834 &iport->viit_registers->initiator_sas_address_lo);
835
836 /* This value get cleared just in case its not already cleared */
837 writel(0, &iport->viit_registers->reserved);
838
839 /* We are required to update the status register last */
840 writel(SCU_VIIT_ENTRY_ID_VIIT |
841 SCU_VIIT_IPPT_INITIATOR |
842 ((1 << iport->physical_port_index) << SCU_VIIT_ENTRY_LPVIE_SHIFT) |
843 SCU_VIIT_STATUS_ALL_VALID,
844 &iport->viit_registers->status);
845 }
846
sci_port_get_max_allowed_speed(struct isci_port * iport)847 enum sas_linkrate sci_port_get_max_allowed_speed(struct isci_port *iport)
848 {
849 u16 index;
850 struct isci_phy *iphy;
851 enum sas_linkrate max_allowed_speed = SAS_LINK_RATE_6_0_GBPS;
852
853 /*
854 * Loop through all of the phys in this port and find the phy with the
855 * lowest maximum link rate. */
856 for (index = 0; index < SCI_MAX_PHYS; index++) {
857 iphy = iport->phy_table[index];
858 if (iphy && sci_port_active_phy(iport, iphy) &&
859 iphy->max_negotiated_speed < max_allowed_speed)
860 max_allowed_speed = iphy->max_negotiated_speed;
861 }
862
863 return max_allowed_speed;
864 }
865
sci_port_suspend_port_task_scheduler(struct isci_port * iport)866 static void sci_port_suspend_port_task_scheduler(struct isci_port *iport)
867 {
868 u32 pts_control_value;
869
870 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
871 pts_control_value |= SCU_PTSxCR_GEN_BIT(SUSPEND);
872 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
873 }
874
875 /**
876 * sci_port_post_dummy_request() - post dummy/workaround request
877 * @sci_port: port to post task
878 *
879 * Prevent the hardware scheduler from posting new requests to the front
880 * of the scheduler queue causing a starvation problem for currently
881 * ongoing requests.
882 *
883 */
sci_port_post_dummy_request(struct isci_port * iport)884 static void sci_port_post_dummy_request(struct isci_port *iport)
885 {
886 struct isci_host *ihost = iport->owning_controller;
887 u16 tag = iport->reserved_tag;
888 struct scu_task_context *tc;
889 u32 command;
890
891 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
892 tc->abort = 0;
893
894 command = SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC |
895 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
896 ISCI_TAG_TCI(tag);
897
898 sci_controller_post_request(ihost, command);
899 }
900
901 /**
902 * This routine will abort the dummy request. This will alow the hardware to
903 * power down parts of the silicon to save power.
904 *
905 * @sci_port: The port on which the task must be aborted.
906 *
907 */
sci_port_abort_dummy_request(struct isci_port * iport)908 static void sci_port_abort_dummy_request(struct isci_port *iport)
909 {
910 struct isci_host *ihost = iport->owning_controller;
911 u16 tag = iport->reserved_tag;
912 struct scu_task_context *tc;
913 u32 command;
914
915 tc = &ihost->task_context_table[ISCI_TAG_TCI(tag)];
916 tc->abort = 1;
917
918 command = SCU_CONTEXT_COMMAND_REQUEST_POST_TC_ABORT |
919 iport->physical_port_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT |
920 ISCI_TAG_TCI(tag);
921
922 sci_controller_post_request(ihost, command);
923 }
924
925 /**
926 *
927 * @sci_port: This is the struct isci_port object to resume.
928 *
929 * This method will resume the port task scheduler for this port object. none
930 */
931 static void
sci_port_resume_port_task_scheduler(struct isci_port * iport)932 sci_port_resume_port_task_scheduler(struct isci_port *iport)
933 {
934 u32 pts_control_value;
935
936 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
937 pts_control_value &= ~SCU_PTSxCR_GEN_BIT(SUSPEND);
938 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
939 }
940
sci_port_ready_substate_waiting_enter(struct sci_base_state_machine * sm)941 static void sci_port_ready_substate_waiting_enter(struct sci_base_state_machine *sm)
942 {
943 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
944
945 sci_port_suspend_port_task_scheduler(iport);
946
947 iport->not_ready_reason = SCIC_PORT_NOT_READY_NO_ACTIVE_PHYS;
948
949 if (iport->active_phy_mask != 0) {
950 /* At least one of the phys on the port is ready */
951 port_state_machine_change(iport,
952 SCI_PORT_SUB_OPERATIONAL);
953 }
954 }
955
scic_sds_port_ready_substate_waiting_exit(struct sci_base_state_machine * sm)956 static void scic_sds_port_ready_substate_waiting_exit(
957 struct sci_base_state_machine *sm)
958 {
959 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
960 sci_port_resume_port_task_scheduler(iport);
961 }
962
sci_port_ready_substate_operational_enter(struct sci_base_state_machine * sm)963 static void sci_port_ready_substate_operational_enter(struct sci_base_state_machine *sm)
964 {
965 u32 index;
966 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
967 struct isci_host *ihost = iport->owning_controller;
968
969 dev_dbg(&ihost->pdev->dev, "%s: port%d ready\n",
970 __func__, iport->physical_port_index);
971
972 for (index = 0; index < SCI_MAX_PHYS; index++) {
973 if (iport->phy_table[index]) {
974 writel(iport->physical_port_index,
975 &iport->port_pe_configuration_register[
976 iport->phy_table[index]->phy_index]);
977 if (((iport->active_phy_mask^iport->enabled_phy_mask) & (1 << index)) != 0)
978 sci_port_resume_phy(iport, iport->phy_table[index]);
979 }
980 }
981
982 sci_port_update_viit_entry(iport);
983
984 /*
985 * Post the dummy task for the port so the hardware can schedule
986 * io correctly
987 */
988 sci_port_post_dummy_request(iport);
989 }
990
sci_port_invalidate_dummy_remote_node(struct isci_port * iport)991 static void sci_port_invalidate_dummy_remote_node(struct isci_port *iport)
992 {
993 struct isci_host *ihost = iport->owning_controller;
994 u8 phys_index = iport->physical_port_index;
995 union scu_remote_node_context *rnc;
996 u16 rni = iport->reserved_rni;
997 u32 command;
998
999 rnc = &ihost->remote_node_context_table[rni];
1000
1001 rnc->ssp.is_valid = false;
1002
1003 /* ensure the preceding tc abort request has reached the
1004 * controller and give it ample time to act before posting the rnc
1005 * invalidate
1006 */
1007 readl(&ihost->smu_registers->interrupt_status); /* flush */
1008 udelay(10);
1009
1010 command = SCU_CONTEXT_COMMAND_POST_RNC_INVALIDATE |
1011 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1012
1013 sci_controller_post_request(ihost, command);
1014 }
1015
1016 /**
1017 *
1018 * @object: This is the object which is cast to a struct isci_port object.
1019 *
1020 * This method will perform the actions required by the struct isci_port on
1021 * exiting the SCI_PORT_SUB_OPERATIONAL. This function reports
1022 * the port not ready and suspends the port task scheduler. none
1023 */
sci_port_ready_substate_operational_exit(struct sci_base_state_machine * sm)1024 static void sci_port_ready_substate_operational_exit(struct sci_base_state_machine *sm)
1025 {
1026 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1027 struct isci_host *ihost = iport->owning_controller;
1028
1029 /*
1030 * Kill the dummy task for this port if it has not yet posted
1031 * the hardware will treat this as a NOP and just return abort
1032 * complete.
1033 */
1034 sci_port_abort_dummy_request(iport);
1035
1036 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1037 __func__, iport->physical_port_index);
1038
1039 if (iport->ready_exit)
1040 sci_port_invalidate_dummy_remote_node(iport);
1041 }
1042
sci_port_ready_substate_configuring_enter(struct sci_base_state_machine * sm)1043 static void sci_port_ready_substate_configuring_enter(struct sci_base_state_machine *sm)
1044 {
1045 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1046 struct isci_host *ihost = iport->owning_controller;
1047
1048 if (iport->active_phy_mask == 0) {
1049 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1050 __func__, iport->physical_port_index);
1051
1052 port_state_machine_change(iport, SCI_PORT_SUB_WAITING);
1053 } else
1054 port_state_machine_change(iport, SCI_PORT_SUB_OPERATIONAL);
1055 }
1056
sci_port_start(struct isci_port * iport)1057 enum sci_status sci_port_start(struct isci_port *iport)
1058 {
1059 struct isci_host *ihost = iport->owning_controller;
1060 enum sci_status status = SCI_SUCCESS;
1061 enum sci_port_states state;
1062 u32 phy_mask;
1063
1064 state = iport->sm.current_state_id;
1065 if (state != SCI_PORT_STOPPED) {
1066 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1067 __func__, port_state_name(state));
1068 return SCI_FAILURE_INVALID_STATE;
1069 }
1070
1071 if (iport->assigned_device_count > 0) {
1072 /* TODO This is a start failure operation because
1073 * there are still devices assigned to this port.
1074 * There must be no devices assigned to a port on a
1075 * start operation.
1076 */
1077 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1078 }
1079
1080 if (iport->reserved_rni == SCU_DUMMY_INDEX) {
1081 u16 rni = sci_remote_node_table_allocate_remote_node(
1082 &ihost->available_remote_nodes, 1);
1083
1084 if (rni != SCU_DUMMY_INDEX)
1085 sci_port_construct_dummy_rnc(iport, rni);
1086 else
1087 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
1088 iport->reserved_rni = rni;
1089 }
1090
1091 if (iport->reserved_tag == SCI_CONTROLLER_INVALID_IO_TAG) {
1092 u16 tag;
1093
1094 tag = isci_alloc_tag(ihost);
1095 if (tag == SCI_CONTROLLER_INVALID_IO_TAG)
1096 status = SCI_FAILURE_INSUFFICIENT_RESOURCES;
1097 else
1098 sci_port_construct_dummy_task(iport, tag);
1099 iport->reserved_tag = tag;
1100 }
1101
1102 if (status == SCI_SUCCESS) {
1103 phy_mask = sci_port_get_phys(iport);
1104
1105 /*
1106 * There are one or more phys assigned to this port. Make sure
1107 * the port's phy mask is in fact legal and supported by the
1108 * silicon.
1109 */
1110 if (sci_port_is_phy_mask_valid(iport, phy_mask) == true) {
1111 port_state_machine_change(iport,
1112 SCI_PORT_READY);
1113
1114 return SCI_SUCCESS;
1115 }
1116 status = SCI_FAILURE;
1117 }
1118
1119 if (status != SCI_SUCCESS)
1120 sci_port_destroy_dummy_resources(iport);
1121
1122 return status;
1123 }
1124
sci_port_stop(struct isci_port * iport)1125 enum sci_status sci_port_stop(struct isci_port *iport)
1126 {
1127 enum sci_port_states state;
1128
1129 state = iport->sm.current_state_id;
1130 switch (state) {
1131 case SCI_PORT_STOPPED:
1132 return SCI_SUCCESS;
1133 case SCI_PORT_SUB_WAITING:
1134 case SCI_PORT_SUB_OPERATIONAL:
1135 case SCI_PORT_SUB_CONFIGURING:
1136 case SCI_PORT_RESETTING:
1137 port_state_machine_change(iport,
1138 SCI_PORT_STOPPING);
1139 return SCI_SUCCESS;
1140 default:
1141 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1142 __func__, port_state_name(state));
1143 return SCI_FAILURE_INVALID_STATE;
1144 }
1145 }
1146
sci_port_hard_reset(struct isci_port * iport,u32 timeout)1147 static enum sci_status sci_port_hard_reset(struct isci_port *iport, u32 timeout)
1148 {
1149 enum sci_status status = SCI_FAILURE_INVALID_PHY;
1150 struct isci_phy *iphy = NULL;
1151 enum sci_port_states state;
1152 u32 phy_index;
1153
1154 state = iport->sm.current_state_id;
1155 if (state != SCI_PORT_SUB_OPERATIONAL) {
1156 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1157 __func__, port_state_name(state));
1158 return SCI_FAILURE_INVALID_STATE;
1159 }
1160
1161 /* Select a phy on which we can send the hard reset request. */
1162 for (phy_index = 0; phy_index < SCI_MAX_PHYS && !iphy; phy_index++) {
1163 iphy = iport->phy_table[phy_index];
1164 if (iphy && !sci_port_active_phy(iport, iphy)) {
1165 /*
1166 * We found a phy but it is not ready select
1167 * different phy
1168 */
1169 iphy = NULL;
1170 }
1171 }
1172
1173 /* If we have a phy then go ahead and start the reset procedure */
1174 if (!iphy)
1175 return status;
1176 status = sci_phy_reset(iphy);
1177
1178 if (status != SCI_SUCCESS)
1179 return status;
1180
1181 sci_mod_timer(&iport->timer, timeout);
1182 iport->not_ready_reason = SCIC_PORT_NOT_READY_HARD_RESET_REQUESTED;
1183
1184 port_state_machine_change(iport, SCI_PORT_RESETTING);
1185 return SCI_SUCCESS;
1186 }
1187
1188 /**
1189 * sci_port_add_phy() -
1190 * @sci_port: This parameter specifies the port in which the phy will be added.
1191 * @sci_phy: This parameter is the phy which is to be added to the port.
1192 *
1193 * This method will add a PHY to the selected port. This method returns an
1194 * enum sci_status. SCI_SUCCESS the phy has been added to the port. Any other
1195 * status is a failure to add the phy to the port.
1196 */
sci_port_add_phy(struct isci_port * iport,struct isci_phy * iphy)1197 enum sci_status sci_port_add_phy(struct isci_port *iport,
1198 struct isci_phy *iphy)
1199 {
1200 enum sci_status status;
1201 enum sci_port_states state;
1202
1203 sci_port_bcn_enable(iport);
1204
1205 state = iport->sm.current_state_id;
1206 switch (state) {
1207 case SCI_PORT_STOPPED: {
1208 struct sci_sas_address port_sas_address;
1209
1210 /* Read the port assigned SAS Address if there is one */
1211 sci_port_get_sas_address(iport, &port_sas_address);
1212
1213 if (port_sas_address.high != 0 && port_sas_address.low != 0) {
1214 struct sci_sas_address phy_sas_address;
1215
1216 /* Make sure that the PHY SAS Address matches the SAS Address
1217 * for this port
1218 */
1219 sci_phy_get_sas_address(iphy, &phy_sas_address);
1220
1221 if (port_sas_address.high != phy_sas_address.high ||
1222 port_sas_address.low != phy_sas_address.low)
1223 return SCI_FAILURE_UNSUPPORTED_PORT_CONFIGURATION;
1224 }
1225 return sci_port_set_phy(iport, iphy);
1226 }
1227 case SCI_PORT_SUB_WAITING:
1228 case SCI_PORT_SUB_OPERATIONAL:
1229 status = sci_port_set_phy(iport, iphy);
1230
1231 if (status != SCI_SUCCESS)
1232 return status;
1233
1234 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
1235 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1236 port_state_machine_change(iport, SCI_PORT_SUB_CONFIGURING);
1237
1238 return status;
1239 case SCI_PORT_SUB_CONFIGURING:
1240 status = sci_port_set_phy(iport, iphy);
1241
1242 if (status != SCI_SUCCESS)
1243 return status;
1244 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY);
1245
1246 /* Re-enter the configuring state since this may be the last phy in
1247 * the port.
1248 */
1249 port_state_machine_change(iport,
1250 SCI_PORT_SUB_CONFIGURING);
1251 return SCI_SUCCESS;
1252 default:
1253 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1254 __func__, port_state_name(state));
1255 return SCI_FAILURE_INVALID_STATE;
1256 }
1257 }
1258
1259 /**
1260 * sci_port_remove_phy() -
1261 * @sci_port: This parameter specifies the port in which the phy will be added.
1262 * @sci_phy: This parameter is the phy which is to be added to the port.
1263 *
1264 * This method will remove the PHY from the selected PORT. This method returns
1265 * an enum sci_status. SCI_SUCCESS the phy has been removed from the port. Any
1266 * other status is a failure to add the phy to the port.
1267 */
sci_port_remove_phy(struct isci_port * iport,struct isci_phy * iphy)1268 enum sci_status sci_port_remove_phy(struct isci_port *iport,
1269 struct isci_phy *iphy)
1270 {
1271 enum sci_status status;
1272 enum sci_port_states state;
1273
1274 state = iport->sm.current_state_id;
1275
1276 switch (state) {
1277 case SCI_PORT_STOPPED:
1278 return sci_port_clear_phy(iport, iphy);
1279 case SCI_PORT_SUB_OPERATIONAL:
1280 status = sci_port_clear_phy(iport, iphy);
1281 if (status != SCI_SUCCESS)
1282 return status;
1283
1284 sci_port_deactivate_phy(iport, iphy, true);
1285 iport->not_ready_reason = SCIC_PORT_NOT_READY_RECONFIGURING;
1286 port_state_machine_change(iport,
1287 SCI_PORT_SUB_CONFIGURING);
1288 return SCI_SUCCESS;
1289 case SCI_PORT_SUB_CONFIGURING:
1290 status = sci_port_clear_phy(iport, iphy);
1291
1292 if (status != SCI_SUCCESS)
1293 return status;
1294 sci_port_deactivate_phy(iport, iphy, true);
1295
1296 /* Re-enter the configuring state since this may be the last phy in
1297 * the port
1298 */
1299 port_state_machine_change(iport,
1300 SCI_PORT_SUB_CONFIGURING);
1301 return SCI_SUCCESS;
1302 default:
1303 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1304 __func__, port_state_name(state));
1305 return SCI_FAILURE_INVALID_STATE;
1306 }
1307 }
1308
sci_port_link_up(struct isci_port * iport,struct isci_phy * iphy)1309 enum sci_status sci_port_link_up(struct isci_port *iport,
1310 struct isci_phy *iphy)
1311 {
1312 enum sci_port_states state;
1313
1314 state = iport->sm.current_state_id;
1315 switch (state) {
1316 case SCI_PORT_SUB_WAITING:
1317 /* Since this is the first phy going link up for the port we
1318 * can just enable it and continue
1319 */
1320 sci_port_activate_phy(iport, iphy, PF_NOTIFY|PF_RESUME);
1321
1322 port_state_machine_change(iport,
1323 SCI_PORT_SUB_OPERATIONAL);
1324 return SCI_SUCCESS;
1325 case SCI_PORT_SUB_OPERATIONAL:
1326 sci_port_general_link_up_handler(iport, iphy, PF_NOTIFY|PF_RESUME);
1327 return SCI_SUCCESS;
1328 case SCI_PORT_RESETTING:
1329 /* TODO We should make sure that the phy that has gone
1330 * link up is the same one on which we sent the reset. It is
1331 * possible that the phy on which we sent the reset is not the
1332 * one that has gone link up and we want to make sure that
1333 * phy being reset comes back. Consider the case where a
1334 * reset is sent but before the hardware processes the reset it
1335 * get a link up on the port because of a hot plug event.
1336 * because of the reset request this phy will go link down
1337 * almost immediately.
1338 */
1339
1340 /* In the resetting state we don't notify the user regarding
1341 * link up and link down notifications.
1342 */
1343 sci_port_general_link_up_handler(iport, iphy, PF_RESUME);
1344 return SCI_SUCCESS;
1345 default:
1346 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1347 __func__, port_state_name(state));
1348 return SCI_FAILURE_INVALID_STATE;
1349 }
1350 }
1351
sci_port_link_down(struct isci_port * iport,struct isci_phy * iphy)1352 enum sci_status sci_port_link_down(struct isci_port *iport,
1353 struct isci_phy *iphy)
1354 {
1355 enum sci_port_states state;
1356
1357 state = iport->sm.current_state_id;
1358 switch (state) {
1359 case SCI_PORT_SUB_OPERATIONAL:
1360 sci_port_deactivate_phy(iport, iphy, true);
1361
1362 /* If there are no active phys left in the port, then
1363 * transition the port to the WAITING state until such time
1364 * as a phy goes link up
1365 */
1366 if (iport->active_phy_mask == 0)
1367 port_state_machine_change(iport,
1368 SCI_PORT_SUB_WAITING);
1369 return SCI_SUCCESS;
1370 case SCI_PORT_RESETTING:
1371 /* In the resetting state we don't notify the user regarding
1372 * link up and link down notifications. */
1373 sci_port_deactivate_phy(iport, iphy, false);
1374 return SCI_SUCCESS;
1375 default:
1376 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1377 __func__, port_state_name(state));
1378 return SCI_FAILURE_INVALID_STATE;
1379 }
1380 }
1381
sci_port_start_io(struct isci_port * iport,struct isci_remote_device * idev,struct isci_request * ireq)1382 enum sci_status sci_port_start_io(struct isci_port *iport,
1383 struct isci_remote_device *idev,
1384 struct isci_request *ireq)
1385 {
1386 enum sci_port_states state;
1387
1388 state = iport->sm.current_state_id;
1389 switch (state) {
1390 case SCI_PORT_SUB_WAITING:
1391 return SCI_FAILURE_INVALID_STATE;
1392 case SCI_PORT_SUB_OPERATIONAL:
1393 iport->started_request_count++;
1394 return SCI_SUCCESS;
1395 default:
1396 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1397 __func__, port_state_name(state));
1398 return SCI_FAILURE_INVALID_STATE;
1399 }
1400 }
1401
sci_port_complete_io(struct isci_port * iport,struct isci_remote_device * idev,struct isci_request * ireq)1402 enum sci_status sci_port_complete_io(struct isci_port *iport,
1403 struct isci_remote_device *idev,
1404 struct isci_request *ireq)
1405 {
1406 enum sci_port_states state;
1407
1408 state = iport->sm.current_state_id;
1409 switch (state) {
1410 case SCI_PORT_STOPPED:
1411 dev_warn(sciport_to_dev(iport), "%s: in wrong state: %s\n",
1412 __func__, port_state_name(state));
1413 return SCI_FAILURE_INVALID_STATE;
1414 case SCI_PORT_STOPPING:
1415 sci_port_decrement_request_count(iport);
1416
1417 if (iport->started_request_count == 0)
1418 port_state_machine_change(iport,
1419 SCI_PORT_STOPPED);
1420 break;
1421 case SCI_PORT_READY:
1422 case SCI_PORT_RESETTING:
1423 case SCI_PORT_FAILED:
1424 case SCI_PORT_SUB_WAITING:
1425 case SCI_PORT_SUB_OPERATIONAL:
1426 sci_port_decrement_request_count(iport);
1427 break;
1428 case SCI_PORT_SUB_CONFIGURING:
1429 sci_port_decrement_request_count(iport);
1430 if (iport->started_request_count == 0) {
1431 port_state_machine_change(iport,
1432 SCI_PORT_SUB_OPERATIONAL);
1433 }
1434 break;
1435 }
1436 return SCI_SUCCESS;
1437 }
1438
sci_port_enable_port_task_scheduler(struct isci_port * iport)1439 static void sci_port_enable_port_task_scheduler(struct isci_port *iport)
1440 {
1441 u32 pts_control_value;
1442
1443 /* enable the port task scheduler in a suspended state */
1444 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
1445 pts_control_value |= SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND);
1446 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
1447 }
1448
sci_port_disable_port_task_scheduler(struct isci_port * iport)1449 static void sci_port_disable_port_task_scheduler(struct isci_port *iport)
1450 {
1451 u32 pts_control_value;
1452
1453 pts_control_value = readl(&iport->port_task_scheduler_registers->control);
1454 pts_control_value &=
1455 ~(SCU_PTSxCR_GEN_BIT(ENABLE) | SCU_PTSxCR_GEN_BIT(SUSPEND));
1456 writel(pts_control_value, &iport->port_task_scheduler_registers->control);
1457 }
1458
sci_port_post_dummy_remote_node(struct isci_port * iport)1459 static void sci_port_post_dummy_remote_node(struct isci_port *iport)
1460 {
1461 struct isci_host *ihost = iport->owning_controller;
1462 u8 phys_index = iport->physical_port_index;
1463 union scu_remote_node_context *rnc;
1464 u16 rni = iport->reserved_rni;
1465 u32 command;
1466
1467 rnc = &ihost->remote_node_context_table[rni];
1468 rnc->ssp.is_valid = true;
1469
1470 command = SCU_CONTEXT_COMMAND_POST_RNC_32 |
1471 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1472
1473 sci_controller_post_request(ihost, command);
1474
1475 /* ensure hardware has seen the post rnc command and give it
1476 * ample time to act before sending the suspend
1477 */
1478 readl(&ihost->smu_registers->interrupt_status); /* flush */
1479 udelay(10);
1480
1481 command = SCU_CONTEXT_COMMAND_POST_RNC_SUSPEND_TX_RX |
1482 phys_index << SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT | rni;
1483
1484 sci_controller_post_request(ihost, command);
1485 }
1486
sci_port_stopped_state_enter(struct sci_base_state_machine * sm)1487 static void sci_port_stopped_state_enter(struct sci_base_state_machine *sm)
1488 {
1489 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1490
1491 if (iport->sm.previous_state_id == SCI_PORT_STOPPING) {
1492 /*
1493 * If we enter this state becasuse of a request to stop
1494 * the port then we want to disable the hardwares port
1495 * task scheduler. */
1496 sci_port_disable_port_task_scheduler(iport);
1497 }
1498 }
1499
sci_port_stopped_state_exit(struct sci_base_state_machine * sm)1500 static void sci_port_stopped_state_exit(struct sci_base_state_machine *sm)
1501 {
1502 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1503
1504 /* Enable and suspend the port task scheduler */
1505 sci_port_enable_port_task_scheduler(iport);
1506 }
1507
sci_port_ready_state_enter(struct sci_base_state_machine * sm)1508 static void sci_port_ready_state_enter(struct sci_base_state_machine *sm)
1509 {
1510 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1511 struct isci_host *ihost = iport->owning_controller;
1512 u32 prev_state;
1513
1514 prev_state = iport->sm.previous_state_id;
1515 if (prev_state == SCI_PORT_RESETTING)
1516 isci_port_hard_reset_complete(iport, SCI_SUCCESS);
1517 else
1518 dev_dbg(&ihost->pdev->dev, "%s: port%d !ready\n",
1519 __func__, iport->physical_port_index);
1520
1521 /* Post and suspend the dummy remote node context for this port. */
1522 sci_port_post_dummy_remote_node(iport);
1523
1524 /* Start the ready substate machine */
1525 port_state_machine_change(iport,
1526 SCI_PORT_SUB_WAITING);
1527 }
1528
sci_port_resetting_state_exit(struct sci_base_state_machine * sm)1529 static void sci_port_resetting_state_exit(struct sci_base_state_machine *sm)
1530 {
1531 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1532
1533 sci_del_timer(&iport->timer);
1534 }
1535
sci_port_stopping_state_exit(struct sci_base_state_machine * sm)1536 static void sci_port_stopping_state_exit(struct sci_base_state_machine *sm)
1537 {
1538 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1539
1540 sci_del_timer(&iport->timer);
1541
1542 sci_port_destroy_dummy_resources(iport);
1543 }
1544
sci_port_failed_state_enter(struct sci_base_state_machine * sm)1545 static void sci_port_failed_state_enter(struct sci_base_state_machine *sm)
1546 {
1547 struct isci_port *iport = container_of(sm, typeof(*iport), sm);
1548
1549 isci_port_hard_reset_complete(iport, SCI_FAILURE_TIMEOUT);
1550 }
1551
sci_port_set_hang_detection_timeout(struct isci_port * iport,u32 timeout)1552 void sci_port_set_hang_detection_timeout(struct isci_port *iport, u32 timeout)
1553 {
1554 int phy_index;
1555 u32 phy_mask = iport->active_phy_mask;
1556
1557 if (timeout)
1558 ++iport->hang_detect_users;
1559 else if (iport->hang_detect_users > 1)
1560 --iport->hang_detect_users;
1561 else
1562 iport->hang_detect_users = 0;
1563
1564 if (timeout || (iport->hang_detect_users == 0)) {
1565 for (phy_index = 0; phy_index < SCI_MAX_PHYS; phy_index++) {
1566 if ((phy_mask >> phy_index) & 1) {
1567 writel(timeout,
1568 &iport->phy_table[phy_index]
1569 ->link_layer_registers
1570 ->link_layer_hang_detection_timeout);
1571 }
1572 }
1573 }
1574 }
1575 /* --------------------------------------------------------------------------- */
1576
1577 static const struct sci_base_state sci_port_state_table[] = {
1578 [SCI_PORT_STOPPED] = {
1579 .enter_state = sci_port_stopped_state_enter,
1580 .exit_state = sci_port_stopped_state_exit
1581 },
1582 [SCI_PORT_STOPPING] = {
1583 .exit_state = sci_port_stopping_state_exit
1584 },
1585 [SCI_PORT_READY] = {
1586 .enter_state = sci_port_ready_state_enter,
1587 },
1588 [SCI_PORT_SUB_WAITING] = {
1589 .enter_state = sci_port_ready_substate_waiting_enter,
1590 .exit_state = scic_sds_port_ready_substate_waiting_exit,
1591 },
1592 [SCI_PORT_SUB_OPERATIONAL] = {
1593 .enter_state = sci_port_ready_substate_operational_enter,
1594 .exit_state = sci_port_ready_substate_operational_exit
1595 },
1596 [SCI_PORT_SUB_CONFIGURING] = {
1597 .enter_state = sci_port_ready_substate_configuring_enter
1598 },
1599 [SCI_PORT_RESETTING] = {
1600 .exit_state = sci_port_resetting_state_exit
1601 },
1602 [SCI_PORT_FAILED] = {
1603 .enter_state = sci_port_failed_state_enter,
1604 }
1605 };
1606
sci_port_construct(struct isci_port * iport,u8 index,struct isci_host * ihost)1607 void sci_port_construct(struct isci_port *iport, u8 index,
1608 struct isci_host *ihost)
1609 {
1610 sci_init_sm(&iport->sm, sci_port_state_table, SCI_PORT_STOPPED);
1611
1612 iport->logical_port_index = SCIC_SDS_DUMMY_PORT;
1613 iport->physical_port_index = index;
1614 iport->active_phy_mask = 0;
1615 iport->enabled_phy_mask = 0;
1616 iport->last_active_phy = 0;
1617 iport->ready_exit = false;
1618
1619 iport->owning_controller = ihost;
1620
1621 iport->started_request_count = 0;
1622 iport->assigned_device_count = 0;
1623 iport->hang_detect_users = 0;
1624
1625 iport->reserved_rni = SCU_DUMMY_INDEX;
1626 iport->reserved_tag = SCI_CONTROLLER_INVALID_IO_TAG;
1627
1628 sci_init_timer(&iport->timer, port_timeout);
1629
1630 iport->port_task_scheduler_registers = NULL;
1631
1632 for (index = 0; index < SCI_MAX_PHYS; index++)
1633 iport->phy_table[index] = NULL;
1634 }
1635
sci_port_broadcast_change_received(struct isci_port * iport,struct isci_phy * iphy)1636 void sci_port_broadcast_change_received(struct isci_port *iport, struct isci_phy *iphy)
1637 {
1638 struct isci_host *ihost = iport->owning_controller;
1639
1640 /* notify the user. */
1641 isci_port_bc_change_received(ihost, iport, iphy);
1642 }
1643
wait_port_reset(struct isci_host * ihost,struct isci_port * iport)1644 static void wait_port_reset(struct isci_host *ihost, struct isci_port *iport)
1645 {
1646 wait_event(ihost->eventq, !test_bit(IPORT_RESET_PENDING, &iport->state));
1647 }
1648
isci_port_perform_hard_reset(struct isci_host * ihost,struct isci_port * iport,struct isci_phy * iphy)1649 int isci_port_perform_hard_reset(struct isci_host *ihost, struct isci_port *iport,
1650 struct isci_phy *iphy)
1651 {
1652 unsigned long flags;
1653 enum sci_status status;
1654 int ret = TMF_RESP_FUNC_COMPLETE;
1655
1656 dev_dbg(&ihost->pdev->dev, "%s: iport = %p\n",
1657 __func__, iport);
1658
1659 spin_lock_irqsave(&ihost->scic_lock, flags);
1660 set_bit(IPORT_RESET_PENDING, &iport->state);
1661
1662 #define ISCI_PORT_RESET_TIMEOUT SCIC_SDS_SIGNATURE_FIS_TIMEOUT
1663 status = sci_port_hard_reset(iport, ISCI_PORT_RESET_TIMEOUT);
1664
1665 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1666
1667 if (status == SCI_SUCCESS) {
1668 wait_port_reset(ihost, iport);
1669
1670 dev_dbg(&ihost->pdev->dev,
1671 "%s: iport = %p; hard reset completion\n",
1672 __func__, iport);
1673
1674 if (iport->hard_reset_status != SCI_SUCCESS) {
1675 ret = TMF_RESP_FUNC_FAILED;
1676
1677 dev_err(&ihost->pdev->dev,
1678 "%s: iport = %p; hard reset failed (0x%x)\n",
1679 __func__, iport, iport->hard_reset_status);
1680 }
1681 } else {
1682 clear_bit(IPORT_RESET_PENDING, &iport->state);
1683 wake_up(&ihost->eventq);
1684 ret = TMF_RESP_FUNC_FAILED;
1685
1686 dev_err(&ihost->pdev->dev,
1687 "%s: iport = %p; sci_port_hard_reset call"
1688 " failed 0x%x\n",
1689 __func__, iport, status);
1690
1691 }
1692 return ret;
1693 }
1694
isci_ata_check_ready(struct domain_device * dev)1695 int isci_ata_check_ready(struct domain_device *dev)
1696 {
1697 struct isci_port *iport = dev->port->lldd_port;
1698 struct isci_host *ihost = dev_to_ihost(dev);
1699 struct isci_remote_device *idev;
1700 unsigned long flags;
1701 int rc = 0;
1702
1703 spin_lock_irqsave(&ihost->scic_lock, flags);
1704 idev = isci_lookup_device(dev);
1705 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1706
1707 if (!idev)
1708 goto out;
1709
1710 if (test_bit(IPORT_RESET_PENDING, &iport->state))
1711 goto out;
1712
1713 rc = !!iport->active_phy_mask;
1714 out:
1715 isci_put_device(idev);
1716
1717 return rc;
1718 }
1719
isci_port_deformed(struct asd_sas_phy * phy)1720 void isci_port_deformed(struct asd_sas_phy *phy)
1721 {
1722 struct isci_host *ihost = phy->ha->lldd_ha;
1723 struct isci_port *iport = phy->port->lldd_port;
1724 unsigned long flags;
1725 int i;
1726
1727 /* we got a port notification on a port that was subsequently
1728 * torn down and libsas is just now catching up
1729 */
1730 if (!iport)
1731 return;
1732
1733 spin_lock_irqsave(&ihost->scic_lock, flags);
1734 for (i = 0; i < SCI_MAX_PHYS; i++) {
1735 if (iport->active_phy_mask & 1 << i)
1736 break;
1737 }
1738 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1739
1740 if (i >= SCI_MAX_PHYS)
1741 dev_dbg(&ihost->pdev->dev, "%s: port: %ld\n",
1742 __func__, (long) (iport - &ihost->ports[0]));
1743 }
1744
isci_port_formed(struct asd_sas_phy * phy)1745 void isci_port_formed(struct asd_sas_phy *phy)
1746 {
1747 struct isci_host *ihost = phy->ha->lldd_ha;
1748 struct isci_phy *iphy = to_iphy(phy);
1749 struct asd_sas_port *port = phy->port;
1750 struct isci_port *iport = NULL;
1751 unsigned long flags;
1752 int i;
1753
1754 /* initial ports are formed as the driver is still initializing,
1755 * wait for that process to complete
1756 */
1757 wait_for_start(ihost);
1758
1759 spin_lock_irqsave(&ihost->scic_lock, flags);
1760 for (i = 0; i < SCI_MAX_PORTS; i++) {
1761 iport = &ihost->ports[i];
1762 if (iport->active_phy_mask & 1 << iphy->phy_index)
1763 break;
1764 }
1765 spin_unlock_irqrestore(&ihost->scic_lock, flags);
1766
1767 if (i >= SCI_MAX_PORTS)
1768 iport = NULL;
1769
1770 port->lldd_port = iport;
1771 }
1772