Lines Matching refs:mcr

39 	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
50 	mcr	p15, 0, ip, c7, c5, 0		@ flush I cache
51 	mcr	p15, 0, ip, c7, c6, 0		@ flush D cache
52 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
56 	mcr	p15, 0, ip, c1, c0, 0		@ ctrl register
66 	mcr	p15, 0, r0, c7, c0, 4		@ Wait for interrupt
76 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
108 	mcr	p15, 0, ip, c7, c6, 0		@ flush D cache
112 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D index
162 2:	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D index
167 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
168 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
184 2:	mcr	p15, 0, r3, c7, c6, 2		@ flush D entry
189 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
207 2:	mcr	p15, 0, r3, c7, c10, 2		@ clean D entry
213 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
231 	mcr	p15, 0, r3, c7, c14, 2		@ clean/flush D entry
233 	mcr	p15, 0, r3, c7, c6, 2		@ invalidate D entry
239 	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
275 	mcr	p15, 0, r0, c7, c5, 0		@ invalidate I cache
276 	mcr	p15, 0, r0, c7, c6, 0		@ invalidate D cache
277 	mcr	p15, 0, r0, c7, c10, 4		@ drain WB
279 	mcr	p15, 0, r0, c6, c3, 0		@ disable data area 3~7
280 	mcr	p15, 0, r0, c6, c4, 0
281 	mcr	p15, 0, r0, c6, c5, 0
282 	mcr	p15, 0, r0, c6, c6, 0
283 	mcr	p15, 0, r0, c6, c7, 0
285 	mcr	p15, 0, r0, c6, c3, 1		@ disable instruction area 3~7
286 	mcr	p15, 0, r0, c6, c4, 1
287 	mcr	p15, 0, r0, c6, c5, 1
288 	mcr	p15, 0, r0, c6, c6, 1
289 	mcr	p15, 0, r0, c6, c7, 1
292 	mcr	p15, 0, r0, c6,	c0, 0		@ set area 0, default
293 	mcr	p15, 0, r0, c6,	c0, 1
298 	mcr	p15, 0, r3, c6,	c1, 0		@ set area 1, RAM
299 	mcr	p15, 0, r3, c6,	c1, 1
304 	mcr	p15, 0, r3, c6,	c2, 0		@ set area 2, ROM/FLASH
305 	mcr	p15, 0, r3, c6,	c2, 1
308 	mcr	p15, 0, r0, c2, c0, 0		@ Region 1&2 cacheable
309 	mcr	p15, 0, r0, c2, c0, 1
315 	mcr	p15, 0, r0, c3, c0, 0
319 	mcr	p15, 0, r0, c5, c0, 0		@ all read/write access
320 	mcr	p15, 0, r0, c5, c0, 1