233 fp_emulate (int fp_fault, void *bundle, long *ipsr, long *fpsr, long *isr, long *pr, long *ifs,  in fp_emulate()  argument
265 					(unsigned long *) isr, (unsigned long *) pr,  in fp_emulate()
284 handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)  in handle_fpu_swa()  argument
323 		       			current->comm, task_pid_nr(current), regs->cr_iip + ia64_psr(regs)->ri, isr);  in handle_fpu_swa()
328 	exception = fp_emulate(fp_fault, bundle, &regs->cr_ipsr, &regs->ar_fpsr, &isr, &regs->pr,  in handle_fpu_swa()
345 			if (isr & 0x11) {  in handle_fpu_swa()
347 			} else if (isr & 0x22) {  in handle_fpu_swa()
351 			} else if (isr & 0x44) {  in handle_fpu_swa()
356 					0, __ISR_VALID, isr);  in handle_fpu_swa()
367 			if (isr & 0x880) {  in handle_fpu_swa()
369 			} else if (isr & 0x1100) {  in handle_fpu_swa()
371 			} else if (isr & 0x2200) {  in handle_fpu_swa()
376 					0, __ISR_VALID, isr);  in handle_fpu_swa()
416 ia64_fault (unsigned long vector, unsigned long isr, unsigned long ifa,  in ia64_fault()  argument
420 	unsigned long code, error = isr, iip;  in ia64_fault()
434 	if ((isr & IA64_ISR_NA) && ((isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH)) {  in ia64_fault()
447 		code = (isr >> 4) & 0xf;  in ia64_fault()
449 			(code == 3) ? ((isr & (1UL << 37))  in ia64_fault()
462 		if (isr & 2) {  in ia64_fault()
473 			if (((isr >> 4) & 0xf) == 2) {  in ia64_fault()
486 					vector, __ISR_VALID, isr);  in ia64_fault()
496 					vector, __ISR_VALID, isr);  in ia64_fault()
545 				0, __ISR_VALID, isr);  in ia64_fault()
550 		result = handle_fpu_swa((vector == 32) ? 1 : 0, &regs, isr);  in ia64_fault()
553 					0, __ISR_VALID, isr);  in ia64_fault()
558 		if (isr & 0x2) {  in ia64_fault()
591 		       iip, ifa, isr);  in ia64_fault()
598 		       iip, ifa, isr, iim);  in ia64_fault()
603 		sprintf(buf, "IA-32 Interruption Fault (int 0x%lx)", isr >> 16);  in ia64_fault()