91 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;  in microMIPS32_to_MIPS32()
92 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;  in microMIPS32_to_MIPS32()
96 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;  in microMIPS32_to_MIPS32()
97 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;  in microMIPS32_to_MIPS32()
101 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;  in microMIPS32_to_MIPS32()
102 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;  in microMIPS32_to_MIPS32()
106 		mips32_insn.mm_i_format.rt = insn.mm_i_format.rs;  in microMIPS32_to_MIPS32()
107 		mips32_insn.mm_i_format.rs = insn.mm_i_format.rt;  in microMIPS32_to_MIPS32()
111 		if ((insn.mm_i_format.rt == mm_bc1f_op) ||  in microMIPS32_to_MIPS32()
112 		    (insn.mm_i_format.rt == mm_bc1t_op)) {  in microMIPS32_to_MIPS32()
116 				(insn.mm_i_format.rt == mm_bc1t_op) ? 1 : 0;  in microMIPS32_to_MIPS32()
170 				mips32_insn.r_format.rt =  in microMIPS32_to_MIPS32()
255 				mips32_insn.r_format.rt =  in microMIPS32_to_MIPS32()
257 				mips32_insn.r_format.rd = insn.mm_fp4_format.rt;  in microMIPS32_to_MIPS32()
279 					insn.mm_fp3_format.rt;  in microMIPS32_to_MIPS32()
303 					insn.mm_fp3_format.rt;  in microMIPS32_to_MIPS32()
343 					insn.mm_fp1_format.rt;  in microMIPS32_to_MIPS32()
362 					insn.mm_fp1_format.rt;  in microMIPS32_to_MIPS32()
385 				mips32_insn.fp1_format.rt =  in microMIPS32_to_MIPS32()
386 					insn.mm_fp1_format.rt;  in microMIPS32_to_MIPS32()
400 			mips32_insn.fp0_format.ft = insn.mm_fp4_format.rt;  in microMIPS32_to_MIPS32()
452 		switch (insn.i_format.rt) {  in isBranchInstr()
456 			    insn.i_format.rt == bltzall_op))  in isBranchInstr()
480 			    insn.i_format.rt == bgezall_op))  in isBranchInstr()
525 		    regs->regs[insn.i_format.rt])  in isBranchInstr()
540 		    regs->regs[insn.i_format.rt])  in isBranchInstr()
550 		if (!insn.i_format.rt && NO_R6EMU)  in isBranchInstr()
567 		if (cpu_has_mips_r6 && insn.i_format.rt) {  in isBranchInstr()
569 			    ((!insn.i_format.rs && insn.i_format.rt) ||  in isBranchInstr()
570 			     (insn.i_format.rs == insn.i_format.rt)))  in isBranchInstr()
588 		if (!insn.i_format.rt && NO_R6EMU)  in isBranchInstr()
605 		if (cpu_has_mips_r6 && insn.i_format.rt) {  in isBranchInstr()
607 			    ((!insn.i_format.rs && insn.i_format.rt) ||  in isBranchInstr()
608 			     (insn.i_format.rs == insn.i_format.rt)))  in isBranchInstr()
630 		if (insn.i_format.rt && !insn.i_format.rs)  in isBranchInstr()
638 		if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0)  in isBranchInstr()
644 		if ((regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32))) == 0)  in isBranchInstr()
650 		if (regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt))  in isBranchInstr()
656 		if (regs->regs[insn.i_format.rs] & (1ull<<(insn.i_format.rt + 32)))  in isBranchInstr()
706 			fpr = &current->thread.fpu.fpr[insn.i_format.rt];  in isBranchInstr()
739 			bit = (insn.i_format.rt >> 2);  in isBranchInstr()
742 			switch (insn.i_format.rt & 3) {  in isBranchInstr()