Lines Matching refs:ctx
92 static void alchemy_pci_wired_entry(struct alchemy_pci_context *ctx) in alchemy_pci_wired_entry() argument
94 ctx->wired_entry = read_c0_wired(); in alchemy_pci_wired_entry()
95 add_wired_entry(0, 0, (unsigned long)ctx->pci_cfg_vm->addr, PM_4K); in alchemy_pci_wired_entry()
96 ctx->last_elo0 = ctx->last_elo1 = ~0; in alchemy_pci_wired_entry()
102 struct alchemy_pci_context *ctx = bus->sysdata; in config_access() local
114 r = __raw_readl(ctx->regs + PCI_REG_STATCMD) & 0x0000ffff; in config_access()
116 __raw_writel(r, ctx->regs + PCI_REG_STATCMD); in config_access()
122 if (ctx->board_pci_idsel(device, 1) == 0) { in config_access()
147 if ((entryLo0 != ctx->last_elo0) || (entryLo1 != ctx->last_elo1)) { in config_access()
148 mod_wired_entry(ctx->wired_entry, entryLo0, entryLo1, in config_access()
149 (unsigned long)ctx->pci_cfg_vm->addr, PM_4K); in config_access()
150 ctx->last_elo0 = entryLo0; in config_access()
151 ctx->last_elo1 = entryLo1; in config_access()
155 __raw_writel(*data, ctx->pci_cfg_vm->addr + offset); in config_access()
157 *data = __raw_readl(ctx->pci_cfg_vm->addr + offset); in config_access()
164 status = __raw_readl(ctx->regs + PCI_REG_STATCMD); in config_access()
175 __raw_writel(status & 0xf000ffff, ctx->regs + PCI_REG_STATCMD); in config_access()
182 (void)ctx->board_pci_idsel(device, 0); in config_access()
309 struct alchemy_pci_context *ctx = __alchemy_pci_ctx; in alchemy_pci_suspend() local
310 if (!ctx) in alchemy_pci_suspend()
313 ctx->pm[0] = __raw_readl(ctx->regs + PCI_REG_CMEM); in alchemy_pci_suspend()
314 ctx->pm[1] = __raw_readl(ctx->regs + PCI_REG_CONFIG) & 0x0009ffff; in alchemy_pci_suspend()
315 ctx->pm[2] = __raw_readl(ctx->regs + PCI_REG_B2BMASK_CCH); in alchemy_pci_suspend()
316 ctx->pm[3] = __raw_readl(ctx->regs + PCI_REG_B2BBASE0_VID); in alchemy_pci_suspend()
317 ctx->pm[4] = __raw_readl(ctx->regs + PCI_REG_B2BBASE1_SID); in alchemy_pci_suspend()
318 ctx->pm[5] = __raw_readl(ctx->regs + PCI_REG_MWMASK_DEV); in alchemy_pci_suspend()
319 ctx->pm[6] = __raw_readl(ctx->regs + PCI_REG_MWBASE_REV_CCL); in alchemy_pci_suspend()
320 ctx->pm[7] = __raw_readl(ctx->regs + PCI_REG_ID); in alchemy_pci_suspend()
321 ctx->pm[8] = __raw_readl(ctx->regs + PCI_REG_CLASSREV); in alchemy_pci_suspend()
322 ctx->pm[9] = __raw_readl(ctx->regs + PCI_REG_PARAM); in alchemy_pci_suspend()
323 ctx->pm[10] = __raw_readl(ctx->regs + PCI_REG_MBAR); in alchemy_pci_suspend()
324 ctx->pm[11] = __raw_readl(ctx->regs + PCI_REG_TIMEOUT); in alchemy_pci_suspend()
331 struct alchemy_pci_context *ctx = __alchemy_pci_ctx; in alchemy_pci_resume() local
332 if (!ctx) in alchemy_pci_resume()
335 __raw_writel(ctx->pm[0], ctx->regs + PCI_REG_CMEM); in alchemy_pci_resume()
336 __raw_writel(ctx->pm[2], ctx->regs + PCI_REG_B2BMASK_CCH); in alchemy_pci_resume()
337 __raw_writel(ctx->pm[3], ctx->regs + PCI_REG_B2BBASE0_VID); in alchemy_pci_resume()
338 __raw_writel(ctx->pm[4], ctx->regs + PCI_REG_B2BBASE1_SID); in alchemy_pci_resume()
339 __raw_writel(ctx->pm[5], ctx->regs + PCI_REG_MWMASK_DEV); in alchemy_pci_resume()
340 __raw_writel(ctx->pm[6], ctx->regs + PCI_REG_MWBASE_REV_CCL); in alchemy_pci_resume()
341 __raw_writel(ctx->pm[7], ctx->regs + PCI_REG_ID); in alchemy_pci_resume()
342 __raw_writel(ctx->pm[8], ctx->regs + PCI_REG_CLASSREV); in alchemy_pci_resume()
343 __raw_writel(ctx->pm[9], ctx->regs + PCI_REG_PARAM); in alchemy_pci_resume()
344 __raw_writel(ctx->pm[10], ctx->regs + PCI_REG_MBAR); in alchemy_pci_resume()
345 __raw_writel(ctx->pm[11], ctx->regs + PCI_REG_TIMEOUT); in alchemy_pci_resume()
347 __raw_writel(ctx->pm[1], ctx->regs + PCI_REG_CONFIG); in alchemy_pci_resume()
353 ctx->wired_entry = 8191; /* impossibly high value */ in alchemy_pci_resume()
354 alchemy_pci_wired_entry(ctx); /* install it */ in alchemy_pci_resume()
365 struct alchemy_pci_context *ctx; in alchemy_pci_probe() local
379 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); in alchemy_pci_probe()
380 if (!ctx) { in alchemy_pci_probe()
412 ctx->regs = ioremap(r->start, resource_size(r)); in alchemy_pci_probe()
413 if (!ctx->regs) { in alchemy_pci_probe()
429 ctx->alchemy_pci_ctrl.io_map_base = (unsigned long)virt_io; in alchemy_pci_probe()
434 val = __raw_readl(ctx->regs + PCI_REG_CONFIG); in alchemy_pci_probe()
436 __raw_writel(val, ctx->regs + PCI_REG_CONFIG); in alchemy_pci_probe()
442 ctx->board_map_irq = pd->board_map_irq; in alchemy_pci_probe()
445 ctx->board_pci_idsel = pd->board_pci_idsel; in alchemy_pci_probe()
447 ctx->board_pci_idsel = alchemy_pci_def_idsel; in alchemy_pci_probe()
450 ctx->alchemy_pci_ctrl.pci_ops = &alchemy_pci_ops; in alchemy_pci_probe()
451 ctx->alchemy_pci_ctrl.mem_resource = &alchemy_pci_def_memres; in alchemy_pci_probe()
452 ctx->alchemy_pci_ctrl.io_resource = &alchemy_pci_def_iores; in alchemy_pci_probe()
460 ctx->pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); in alchemy_pci_probe()
461 if (!ctx->pci_cfg_vm) { in alchemy_pci_probe()
466 ctx->wired_entry = 8191; /* impossibly high value */ in alchemy_pci_probe()
467 alchemy_pci_wired_entry(ctx); /* install it */ in alchemy_pci_probe()
469 set_io_port_base((unsigned long)ctx->alchemy_pci_ctrl.io_map_base); in alchemy_pci_probe()
472 val = __raw_readl(ctx->regs + PCI_REG_CONFIG); in alchemy_pci_probe()
476 __raw_writel(val, ctx->regs + PCI_REG_CONFIG); in alchemy_pci_probe()
479 __alchemy_pci_ctx = ctx; in alchemy_pci_probe()
480 platform_set_drvdata(pdev, ctx); in alchemy_pci_probe()
482 register_pci_controller(&ctx->alchemy_pci_ctrl); in alchemy_pci_probe()
492 iounmap(ctx->regs); in alchemy_pci_probe()
500 kfree(ctx); in alchemy_pci_probe()
527 struct alchemy_pci_context *ctx = dev->sysdata; in pcibios_map_irq() local
528 if (ctx && ctx->board_map_irq) in pcibios_map_irq()
529 return ctx->board_map_irq(dev, slot, pin); in pcibios_map_irq()