166 	if (event->hw.state & PERF_HES_STOPPED)  in fsl_emb_pmu_read()
175 		prev = local64_read(&event->hw.prev_count);  in fsl_emb_pmu_read()
177 		val = read_pmc(event->hw.idx);  in fsl_emb_pmu_read()
178 	} while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev);  in fsl_emb_pmu_read()
183 	local64_sub(delta, &event->hw.period_left);  in fsl_emb_pmu_read()
287 	if (event->hw.config & FSL_EMB_EVENT_RESTRICTED)  in fsl_emb_pmu_add()
304 	event->hw.idx = i;  in fsl_emb_pmu_add()
309 	if (event->hw.sample_period) {  in fsl_emb_pmu_add()
310 		s64 left = local64_read(&event->hw.period_left);  in fsl_emb_pmu_add()
314 	local64_set(&event->hw.prev_count, val);  in fsl_emb_pmu_add()
317 		event->hw.state = PERF_HES_STOPPED | PERF_HES_UPTODATE;  in fsl_emb_pmu_add()
320 		event->hw.state &= ~(PERF_HES_STOPPED | PERF_HES_UPTODATE);  in fsl_emb_pmu_add()
326 	write_pmlcb(i, event->hw.config >> 32);  in fsl_emb_pmu_add()
327 	write_pmlca(i, event->hw.config_base);  in fsl_emb_pmu_add()
340 	int i = event->hw.idx;  in fsl_emb_pmu_del()
350 	WARN_ON(event != cpuhw->event[event->hw.idx]);  in fsl_emb_pmu_del()
357 	event->hw.idx = -1;  in fsl_emb_pmu_del()
380 	if (event->hw.idx < 0 || !event->hw.sample_period)  in fsl_emb_pmu_start()
383 	if (!(event->hw.state & PERF_HES_STOPPED))  in fsl_emb_pmu_start()
387 		WARN_ON_ONCE(!(event->hw.state & PERF_HES_UPTODATE));  in fsl_emb_pmu_start()
392 	event->hw.state = 0;  in fsl_emb_pmu_start()
393 	left = local64_read(&event->hw.period_left);  in fsl_emb_pmu_start()
397 	write_pmc(event->hw.idx, val);  in fsl_emb_pmu_start()
408 	if (event->hw.idx < 0 || !event->hw.sample_period)  in fsl_emb_pmu_stop()
411 	if (event->hw.state & PERF_HES_STOPPED)  in fsl_emb_pmu_stop()
418 	event->hw.state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;  in fsl_emb_pmu_stop()
419 	write_pmc(event->hw.idx, 0);  in fsl_emb_pmu_stop()
506 	event->hw.config = ppmu->xlate_event(ev);  in fsl_emb_pmu_event_init()
507 	if (!(event->hw.config & FSL_EMB_EVENT_VALID))  in fsl_emb_pmu_event_init()
523 	if (event->hw.config & FSL_EMB_EVENT_RESTRICTED) {  in fsl_emb_pmu_event_init()
526 			if (events[i]->hw.config & FSL_EMB_EVENT_RESTRICTED)  in fsl_emb_pmu_event_init()
534 	event->hw.idx = -1;  in fsl_emb_pmu_event_init()
536 	event->hw.config_base = PMLCA_CE | PMLCA_FCM1 |  in fsl_emb_pmu_event_init()
540 		event->hw.config_base |= PMLCA_FCU;  in fsl_emb_pmu_event_init()
542 		event->hw.config_base |= PMLCA_FCS;  in fsl_emb_pmu_event_init()
546 	event->hw.last_period = event->hw.sample_period;  in fsl_emb_pmu_event_init()
547 	local64_set(&event->hw.period_left, event->hw.last_period);  in fsl_emb_pmu_event_init()
592 	u64 period = event->hw.sample_period;  in record_and_restart()
596 	if (event->hw.state & PERF_HES_STOPPED) {  in record_and_restart()
597 		write_pmc(event->hw.idx, 0);  in record_and_restart()
602 	prev = local64_read(&event->hw.prev_count);  in record_and_restart()
611 	left = local64_read(&event->hw.period_left) - delta;  in record_and_restart()
618 			event->hw.last_period = event->hw.sample_period;  in record_and_restart()
624 	write_pmc(event->hw.idx, val);  in record_and_restart()
625 	local64_set(&event->hw.prev_count, val);  in record_and_restart()
626 	local64_set(&event->hw.period_left, left);  in record_and_restart()
635 		perf_sample_data_init(&data, 0, event->hw.last_period);  in record_and_restart()