202 	wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, NHMEX_U_PMON_GLOBAL_EN_ALL);  in nhmex_uncore_msr_init_box()
207 	wrmsrl(NHMEX_U_MSR_PMON_GLOBAL_CTL, 0);  in nhmex_uncore_msr_exit_box()
221 		wrmsrl(msr, config);  in nhmex_uncore_msr_disable_box()
236 		wrmsrl(msr, config);  in nhmex_uncore_msr_enable_box()
242 	wrmsrl(event->hw.config_base, 0);  in nhmex_uncore_msr_disable_event()
250 		wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);  in nhmex_uncore_msr_enable_event()
252 		wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);  in nhmex_uncore_msr_enable_event()
254 		wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0);  in nhmex_uncore_msr_enable_event()
384 		wrmsrl(reg1->reg, reg1->config);  in nhmex_bbox_msr_enable_event()
385 		wrmsrl(reg1->reg + 1, reg2->config);  in nhmex_bbox_msr_enable_event()
387 	wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 |  in nhmex_bbox_msr_enable_event()
469 		wrmsrl(reg1->reg, 0);  in nhmex_sbox_msr_enable_event()
470 		wrmsrl(reg1->reg + 1, reg1->config);  in nhmex_sbox_msr_enable_event()
471 		wrmsrl(reg1->reg + 2, reg2->config);  in nhmex_sbox_msr_enable_event()
472 		wrmsrl(reg1->reg, NHMEX_S_PMON_MM_CFG_EN);  in nhmex_sbox_msr_enable_event()
474 	wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);  in nhmex_sbox_msr_enable_event()
844 		wrmsrl(__BITS_VALUE(reg1->reg, 0, 16),  in nhmex_mbox_msr_enable_event()
848 		wrmsrl(__BITS_VALUE(reg1->reg, 1, 16),  in nhmex_mbox_msr_enable_event()
852 		wrmsrl(reg2->reg, 0);  in nhmex_mbox_msr_enable_event()
854 			wrmsrl(reg2->reg + 1,  in nhmex_mbox_msr_enable_event()
856 			wrmsrl(reg2->reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK &  in nhmex_mbox_msr_enable_event()
858 			wrmsrl(reg2->reg, NHMEX_M_PMON_MM_CFG_EN);  in nhmex_mbox_msr_enable_event()
862 	wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0);  in nhmex_mbox_msr_enable_event()
1123 		wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG0(port), reg1->config);  in nhmex_rbox_msr_enable_event()
1126 		wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG1(port), reg1->config);  in nhmex_rbox_msr_enable_event()
1130 		wrmsrl(NHMEX_R_MSR_PORTN_QLX_CFG(port),  in nhmex_rbox_msr_enable_event()
1134 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port),  in nhmex_rbox_msr_enable_event()
1136 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MATCH(port), reg1->config);  in nhmex_rbox_msr_enable_event()
1137 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MASK(port), reg2->config);  in nhmex_rbox_msr_enable_event()
1140 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port),  in nhmex_rbox_msr_enable_event()
1142 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MATCH(port), reg1->config);  in nhmex_rbox_msr_enable_event()
1143 		wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MASK(port), reg2->config);  in nhmex_rbox_msr_enable_event()
1147 	wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0 |  in nhmex_rbox_msr_enable_event()