2180 	iterator->level = vcpu->arch.mmu->shadow_root_level;  in shadow_walk_init_using_root()
3347 		if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL &&  in kvm_mmu_free_roots()
3422 	u8 shadow_root_level = mmu->shadow_root_level;  in mmu_alloc_direct_roots()  local
3435 	} else if (shadow_root_level >= PT64_ROOT_4LEVEL) {  in mmu_alloc_direct_roots()
3436 		root = mmu_alloc_root(vcpu, 0, 0, shadow_root_level, true);  in mmu_alloc_direct_roots()
3438 	} else if (shadow_root_level == PT32E_ROOT_LEVEL) {  in mmu_alloc_direct_roots()
3454 		WARN_ONCE(1, "Bad TDP root level = %d\n", shadow_root_level);  in mmu_alloc_direct_roots()
3511 				      mmu->shadow_root_level, false);  in mmu_alloc_shadow_roots()
3527 	if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL) {  in mmu_alloc_shadow_roots()
3536 		if (mmu->shadow_root_level == PT64_ROOT_5LEVEL) {  in mmu_alloc_shadow_roots()
3561 	if (mmu->shadow_root_level == PT64_ROOT_5LEVEL)  in mmu_alloc_shadow_roots()
3563 	else if (mmu->shadow_root_level == PT64_ROOT_4LEVEL)  in mmu_alloc_shadow_roots()
3579 	bool need_pml5 = mmu->shadow_root_level > PT64_ROOT_4LEVEL;  in mmu_alloc_special_roots()
3591 	    mmu->shadow_root_level < PT64_ROOT_4LEVEL)  in mmu_alloc_special_roots()
4155 	if (mmu->shadow_root_level >= PT64_ROOT_4LEVEL &&  in fast_pgd_switch()
4426 	WARN_ON_ONCE(context->shadow_root_level < PT32E_ROOT_LEVEL);  in reset_shadow_zero_bits_mask()
4430 				context->shadow_root_level, uses_nx,  in reset_shadow_zero_bits_mask()
4436 	for (i = context->shadow_root_level; --i >= 0;) {  in reset_shadow_zero_bits_mask()
4464 					context->shadow_root_level, false,  in reset_tdp_shadow_zero_bits_mask()
4474 	for (i = context->shadow_root_level; --i >= 0;) {  in reset_tdp_shadow_zero_bits_mask()
4757 	context->shadow_root_level = kvm_mmu_get_tdp_level(vcpu);  in init_kvm_tdp_mmu()
4825 	context->shadow_root_level = new_role.base.level;  in shadow_mmu_init_context()
4912 	context->shadow_root_level = level;  in kvm_init_shadow_ept_mmu()