Lines Matching refs:MUX
184 MUX(0, "i2s0_pre", mux_i2s0_p, CLK_SET_RATE_PARENT,
188 MUX(0, "i2s1_pre", mux_i2s1_pre_p, CLK_SET_RATE_PARENT,
192 MUX(0, "i2s2_pre", mux_i2s2_p, CLK_SET_RATE_PARENT,
196 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
200 MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,
204 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
208 MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,
249 MUX(SCLK_HDMI_PHY, "hdmiphy", mux_hdmiphy_p, CLK_SET_RATE_PARENT,
251 MUX(0, "usb480m_phy", mux_usb480m_phy_p, CLK_SET_RATE_PARENT,
253 MUX(0, "usb480m", mux_usb480m_p, CLK_SET_RATE_PARENT,
312 MUX(0, "sclk_rga_src", mux_pll_src_4plls_p, 0,
406 MUX(0, "sclk_vop_src", mux_sclk_vop_src_p, 0,
412 MUX(DCLK_VOP, "dclk_vop", mux_dclk_vop_p, 0,
508 MUX(SCLK_MAC_EXTCLK, "sclk_mac_extclk", mux_sclk_mac_extclk_p, 0,
510 MUX(SCLK_MAC, "sclk_gmac_pre", mux_sclk_gmac_pre_p, 0,