Lines Matching refs:GATE
713 GATE(CLK_PPMULEFT, "ppmuleft", "aclk200", GATE_IP_LEFTBUS, 1, 0, 0),
714 GATE(CLK_PPMURIGHT, "ppmuright", "aclk200", GATE_IP_RIGHTBUS, 1, 0, 0),
715 GATE(CLK_SCLK_HDMI, "sclk_hdmi", "mout_hdmi", SRC_MASK_TV, 0, 0, 0),
716 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "mout_spdif", SRC_MASK_PERIL1, 8, 0,
718 GATE(CLK_JPEG, "jpeg", "aclk160", GATE_IP_CAM, 6, 0, 0),
719 GATE(CLK_MIE0, "mie0", "aclk160", GATE_IP_LCD0, 1, 0, 0),
720 GATE(CLK_DSIM0, "dsim0", "aclk160", GATE_IP_LCD0, 3, 0, 0),
721 GATE(CLK_FIMD1, "fimd1", "aclk160", E4210_GATE_IP_LCD1, 0, 0, 0),
722 GATE(CLK_MIE1, "mie1", "aclk160", E4210_GATE_IP_LCD1, 1, 0, 0),
723 GATE(CLK_DSIM1, "dsim1", "aclk160", E4210_GATE_IP_LCD1, 3, 0, 0),
724 GATE(CLK_SMMU_FIMD1, "smmu_fimd1", "aclk160", E4210_GATE_IP_LCD1, 4, 0,
726 GATE(CLK_TSI, "tsi", "aclk133", GATE_IP_FSYS, 4, 0, 0),
727 GATE(CLK_SROMC, "sromc", "aclk133", GATE_IP_FSYS, 11, 0, 0),
728 GATE(CLK_G3D, "g3d", "aclk200", GATE_IP_G3D, 0, 0, 0),
729 GATE(CLK_PPMUG3D, "ppmug3d", "aclk200", GATE_IP_G3D, 1, 0, 0),
730 GATE(CLK_USB_DEVICE, "usb_device", "aclk133", GATE_IP_FSYS, 13, 0, 0),
731 GATE(CLK_ONENAND, "onenand", "aclk133", GATE_IP_FSYS, 15, 0, 0),
732 GATE(CLK_NFCON, "nfcon", "aclk133", GATE_IP_FSYS, 16, 0, 0),
733 GATE(CLK_GPS, "gps", "aclk133", GATE_IP_GPS, 0, 0, 0),
734 GATE(CLK_SMMU_GPS, "smmu_gps", "aclk133", GATE_IP_GPS, 1, 0, 0),
735 GATE(CLK_PPMUGPS, "ppmugps", "aclk200", GATE_IP_GPS, 2, 0, 0),
736 GATE(CLK_SLIMBUS, "slimbus", "aclk100", GATE_IP_PERIL, 25, 0, 0),
737 GATE(CLK_SCLK_CAM0, "sclk_cam0", "div_cam0", GATE_SCLK_CAM, 4,
739 GATE(CLK_SCLK_CAM1, "sclk_cam1", "div_cam1", GATE_SCLK_CAM, 5,
741 GATE(CLK_SCLK_MIPI0, "sclk_mipi0", "div_mipi_pre0",
743 GATE(CLK_SCLK_AUDIO0, "sclk_audio0", "div_audio0", SRC_MASK_MAUDIO, 0,
745 GATE(CLK_SCLK_AUDIO1, "sclk_audio1", "div_audio1", SRC_MASK_PERIL1, 0,
747 GATE(CLK_VP, "vp", "aclk160", GATE_IP_TV, 0, 0, 0),
748 GATE(CLK_MIXER, "mixer", "aclk160", GATE_IP_TV, 1, 0, 0),
749 GATE(CLK_HDMI, "hdmi", "aclk160", GATE_IP_TV, 3, 0, 0),
750 GATE(CLK_PWM, "pwm", "aclk100", GATE_IP_PERIL, 24, 0, 0),
751 GATE(CLK_SDMMC4, "sdmmc4", "aclk133", GATE_IP_FSYS, 9, 0, 0),
752 GATE(CLK_USB_HOST, "usb_host", "aclk133", GATE_IP_FSYS, 12, 0, 0),
753 GATE(CLK_SCLK_FIMC0, "sclk_fimc0", "div_fimc0", SRC_MASK_CAM, 0,
755 GATE(CLK_SCLK_FIMC1, "sclk_fimc1", "div_fimc1", SRC_MASK_CAM, 4,
757 GATE(CLK_SCLK_FIMC2, "sclk_fimc2", "div_fimc2", SRC_MASK_CAM, 8,
759 GATE(CLK_SCLK_FIMC3, "sclk_fimc3", "div_fimc3", SRC_MASK_CAM, 12,
761 GATE(CLK_SCLK_CSIS0, "sclk_csis0", "div_csis0", SRC_MASK_CAM, 24,
763 GATE(CLK_SCLK_CSIS1, "sclk_csis1", "div_csis1", SRC_MASK_CAM, 28,
765 GATE(CLK_SCLK_FIMD0, "sclk_fimd0", "div_fimd0", SRC_MASK_LCD0, 0,
767 GATE(CLK_SCLK_MMC0, "sclk_mmc0", "div_mmc_pre0", SRC_MASK_FSYS, 0,
769 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "div_mmc_pre1", SRC_MASK_FSYS, 4,
771 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "div_mmc_pre2", SRC_MASK_FSYS, 8,
773 GATE(CLK_SCLK_MMC3, "sclk_mmc3", "div_mmc_pre3", SRC_MASK_FSYS, 12,
775 GATE(CLK_SCLK_MMC4, "sclk_mmc4", "div_mmc_pre4", SRC_MASK_FSYS, 16,
777 GATE(CLK_SCLK_UART0, "uclk0", "div_uart0", SRC_MASK_PERIL0, 0,
779 GATE(CLK_SCLK_UART1, "uclk1", "div_uart1", SRC_MASK_PERIL0, 4,
781 GATE(CLK_SCLK_UART2, "uclk2", "div_uart2", SRC_MASK_PERIL0, 8,
783 GATE(CLK_SCLK_UART3, "uclk3", "div_uart3", SRC_MASK_PERIL0, 12,
785 GATE(CLK_SCLK_UART4, "uclk4", "div_uart4", SRC_MASK_PERIL0, 16,
787 GATE(CLK_SCLK_AUDIO2, "sclk_audio2", "div_audio2", SRC_MASK_PERIL1, 4,
789 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0", SRC_MASK_PERIL1, 16,
791 GATE(CLK_SCLK_SPI1, "sclk_spi1", "div_spi_pre1", SRC_MASK_PERIL1, 20,
793 GATE(CLK_SCLK_SPI2, "sclk_spi2", "div_spi_pre2", SRC_MASK_PERIL1, 24,
795 GATE(CLK_FIMC0, "fimc0", "aclk160", GATE_IP_CAM, 0,
797 GATE(CLK_FIMC1, "fimc1", "aclk160", GATE_IP_CAM, 1,
799 GATE(CLK_FIMC2, "fimc2", "aclk160", GATE_IP_CAM, 2,
801 GATE(CLK_FIMC3, "fimc3", "aclk160", GATE_IP_CAM, 3,
803 GATE(CLK_CSIS0, "csis0", "aclk160", GATE_IP_CAM, 4,
805 GATE(CLK_CSIS1, "csis1", "aclk160", GATE_IP_CAM, 5,
807 GATE(CLK_SMMU_FIMC0, "smmu_fimc0", "aclk160", GATE_IP_CAM, 7,
809 GATE(CLK_SMMU_FIMC1, "smmu_fimc1", "aclk160", GATE_IP_CAM, 8,
811 GATE(CLK_SMMU_FIMC2, "smmu_fimc2", "aclk160", GATE_IP_CAM, 9,
813 GATE(CLK_SMMU_FIMC3, "smmu_fimc3", "aclk160", GATE_IP_CAM, 10,
815 GATE(CLK_SMMU_JPEG, "smmu_jpeg", "aclk160", GATE_IP_CAM, 11,
817 GATE(CLK_PPMUCAMIF, "ppmucamif", "aclk160", GATE_IP_CAM, 16, 0, 0),
818 GATE(CLK_PIXELASYNCM0, "pxl_async0", "aclk160", GATE_IP_CAM, 17, 0, 0),
819 GATE(CLK_PIXELASYNCM1, "pxl_async1", "aclk160", GATE_IP_CAM, 18, 0, 0),
820 GATE(CLK_SMMU_TV, "smmu_tv", "aclk160", GATE_IP_TV, 4,
822 GATE(CLK_PPMUTV, "ppmutv", "aclk160", GATE_IP_TV, 5, 0, 0),
823 GATE(CLK_MFC, "mfc", "aclk100", GATE_IP_MFC, 0, 0, 0),
824 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "aclk100", GATE_IP_MFC, 1,
826 GATE(CLK_SMMU_MFCR, "smmu_mfcr", "aclk100", GATE_IP_MFC, 2,
828 GATE(CLK_PPMUMFC_L, "ppmumfc_l", "aclk100", GATE_IP_MFC, 3, 0, 0),
829 GATE(CLK_PPMUMFC_R, "ppmumfc_r", "aclk100", GATE_IP_MFC, 4, 0, 0),
830 GATE(CLK_FIMD0, "fimd0", "aclk160", GATE_IP_LCD0, 0,
832 GATE(CLK_SMMU_FIMD0, "smmu_fimd0", "aclk160", GATE_IP_LCD0, 4,
834 GATE(CLK_PPMULCD0, "ppmulcd0", "aclk160", GATE_IP_LCD0, 5, 0, 0),
835 GATE(CLK_PDMA0, "pdma0", "aclk133", GATE_IP_FSYS, 0,
837 GATE(CLK_PDMA1, "pdma1", "aclk133", GATE_IP_FSYS, 1,
839 GATE(CLK_SDMMC0, "sdmmc0", "aclk133", GATE_IP_FSYS, 5,
841 GATE(CLK_SDMMC1, "sdmmc1", "aclk133", GATE_IP_FSYS, 6,
843 GATE(CLK_SDMMC2, "sdmmc2", "aclk133", GATE_IP_FSYS, 7,
845 GATE(CLK_SDMMC3, "sdmmc3", "aclk133", GATE_IP_FSYS, 8,
847 GATE(CLK_PPMUFILE, "ppmufile", "aclk133", GATE_IP_FSYS, 17, 0, 0),
848 GATE(CLK_UART0, "uart0", "aclk100", GATE_IP_PERIL, 0,
850 GATE(CLK_UART1, "uart1", "aclk100", GATE_IP_PERIL, 1,
852 GATE(CLK_UART2, "uart2", "aclk100", GATE_IP_PERIL, 2,
854 GATE(CLK_UART3, "uart3", "aclk100", GATE_IP_PERIL, 3,
856 GATE(CLK_UART4, "uart4", "aclk100", GATE_IP_PERIL, 4,
858 GATE(CLK_I2C0, "i2c0", "aclk100", GATE_IP_PERIL, 6,
860 GATE(CLK_I2C1, "i2c1", "aclk100", GATE_IP_PERIL, 7,
862 GATE(CLK_I2C2, "i2c2", "aclk100", GATE_IP_PERIL, 8,
864 GATE(CLK_I2C3, "i2c3", "aclk100", GATE_IP_PERIL, 9,
866 GATE(CLK_I2C4, "i2c4", "aclk100", GATE_IP_PERIL, 10,
868 GATE(CLK_I2C5, "i2c5", "aclk100", GATE_IP_PERIL, 11,
870 GATE(CLK_I2C6, "i2c6", "aclk100", GATE_IP_PERIL, 12,
872 GATE(CLK_I2C7, "i2c7", "aclk100", GATE_IP_PERIL, 13,
874 GATE(CLK_I2C_HDMI, "i2c-hdmi", "aclk100", GATE_IP_PERIL, 14,
876 GATE(CLK_SPI0, "spi0", "aclk100", GATE_IP_PERIL, 16,
878 GATE(CLK_SPI1, "spi1", "aclk100", GATE_IP_PERIL, 17,
880 GATE(CLK_SPI2, "spi2", "aclk100", GATE_IP_PERIL, 18,
882 GATE(CLK_I2S1, "i2s1", "aclk100", GATE_IP_PERIL, 20,
884 GATE(CLK_I2S2, "i2s2", "aclk100", GATE_IP_PERIL, 21,
886 GATE(CLK_PCM1, "pcm1", "aclk100", GATE_IP_PERIL, 22,
888 GATE(CLK_PCM2, "pcm2", "aclk100", GATE_IP_PERIL, 23,
890 GATE(CLK_SPDIF, "spdif", "aclk100", GATE_IP_PERIL, 26,
892 GATE(CLK_AC97, "ac97", "aclk100", GATE_IP_PERIL, 27,
894 GATE(CLK_SSS, "sss", "aclk133", GATE_IP_DMC, 4, 0, 0),
895 GATE(CLK_PPMUDMC0, "ppmudmc0", "aclk133", GATE_IP_DMC, 8, 0, 0),
896 GATE(CLK_PPMUDMC1, "ppmudmc1", "aclk133", GATE_IP_DMC, 9, 0, 0),
897 GATE(CLK_PPMUCPU, "ppmucpu", "aclk133", GATE_IP_DMC, 10, 0, 0),
898 GATE(CLK_PPMUACP, "ppmuacp", "aclk133", GATE_IP_DMC, 16, 0, 0),
900 GATE(CLK_OUT_LEFTBUS, "clkout_leftbus", "div_clkout_leftbus",
902 GATE(CLK_OUT_RIGHTBUS, "clkout_rightbus", "div_clkout_rightbus",
904 GATE(CLK_OUT_TOP, "clkout_top", "div_clkout_top",
906 GATE(CLK_OUT_DMC, "clkout_dmc", "div_clkout_dmc",
908 GATE(CLK_OUT_CPU, "clkout_cpu", "div_clkout_cpu",
914 GATE(CLK_TVENC, "tvenc", "aclk160", GATE_IP_TV, 2, 0, 0),
915 GATE(CLK_G2D, "g2d", "aclk200", E4210_GATE_IP_IMAGE, 0, 0, 0),
916 GATE(CLK_ROTATOR, "rotator", "aclk200", E4210_GATE_IP_IMAGE, 1, 0, 0),
917 GATE(CLK_MDMA, "mdma", "aclk200", E4210_GATE_IP_IMAGE, 2, 0, 0),
918 GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk200", E4210_GATE_IP_IMAGE, 3, 0, 0),
919 GATE(CLK_SMMU_MDMA, "smmu_mdma", "aclk200", E4210_GATE_IP_IMAGE, 5, 0,
921 GATE(CLK_PPMUIMAGE, "ppmuimage", "aclk200", E4210_GATE_IP_IMAGE, 9, 0,
923 GATE(CLK_PPMULCD1, "ppmulcd1", "aclk160", E4210_GATE_IP_LCD1, 5, 0, 0),
924 GATE(CLK_PCIE_PHY, "pcie_phy", "aclk133", GATE_IP_FSYS, 2, 0, 0),
925 GATE(CLK_SATA_PHY, "sata_phy", "aclk133", GATE_IP_FSYS, 3, 0, 0),
926 GATE(CLK_SATA, "sata", "aclk133", GATE_IP_FSYS, 10, 0, 0),
927 GATE(CLK_PCIE, "pcie", "aclk133", GATE_IP_FSYS, 14, 0, 0),
928 GATE(CLK_SMMU_PCIE, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0),
929 GATE(CLK_MODEMIF, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0),
930 GATE(CLK_CHIPID, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, CLK_IGNORE_UNUSED, 0),
931 GATE(CLK_SYSREG, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0,
933 GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0,
935 GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "aclk200",
937 GATE(CLK_SCLK_MIPI1, "sclk_mipi1", "div_mipi_pre1",
939 GATE(CLK_SCLK_SATA, "sclk_sata", "div_sata",
941 GATE(CLK_SCLK_MIXER, "sclk_mixer", "mout_mixer", SRC_MASK_TV, 4, 0, 0),
942 GATE(CLK_SCLK_DAC, "sclk_dac", "mout_dac", SRC_MASK_TV, 8, 0, 0),
943 GATE(CLK_TSADC, "tsadc", "aclk100", GATE_IP_PERIL, 15,
945 GATE(CLK_MCT, "mct", "aclk100", E4210_GATE_IP_PERIR, 13,
947 GATE(CLK_WDT, "watchdog", "aclk100", E4210_GATE_IP_PERIR, 14,
949 GATE(CLK_RTC, "rtc", "aclk100", E4210_GATE_IP_PERIR, 15,
951 GATE(CLK_KEYIF, "keyif", "aclk100", E4210_GATE_IP_PERIR, 16,
953 GATE(CLK_SCLK_FIMD1, "sclk_fimd1", "div_fimd1", E4210_SRC_MASK_LCD1, 0,
955 GATE(CLK_TMU_APBIF, "tmu_apbif", "aclk100", E4210_GATE_IP_PERIR, 17, 0,
961 GATE(CLK_ASYNC_G3D, "async_g3d", "aclk200", GATE_IP_LEFTBUS, 6, 0, 0),
962 GATE(CLK_AUDSS, "audss", "sclk_epll", E4X12_GATE_IP_MAUDIO, 0, 0, 0),
963 GATE(CLK_MDNIE0, "mdnie0", "aclk160", GATE_IP_LCD0, 2, 0, 0),
964 GATE(CLK_ROTATOR, "rotator", "aclk200", E4X12_GATE_IP_IMAGE, 1, 0, 0),
965 GATE(CLK_MDMA, "mdma", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0),
966 GATE(CLK_SMMU_MDMA, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0,
968 GATE(CLK_PPMUIMAGE, "ppmuimage", "aclk200", E4X12_GATE_IP_IMAGE, 9, 0,
970 GATE(CLK_TSADC, "tsadc", "aclk133", E4X12_GATE_BUS_FSYS1, 16, 0, 0),
971 GATE(CLK_MIPI_HSI, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0),
972 GATE(CLK_CHIPID, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, CLK_IGNORE_UNUSED, 0),
973 GATE(CLK_SYSREG, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1,
975 GATE(CLK_HDMI_CEC, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0,
977 GATE(CLK_SCLK_MDNIE0, "sclk_mdnie0", "div_mdnie0",
979 GATE(CLK_SCLK_MDNIE_PWM0, "sclk_mdnie_pwm0", "div_mdnie_pwm_pre0",
981 GATE(CLK_SCLK_MIPIHSI, "sclk_mipihsi", "div_mipihsi",
983 GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "aclk200",
985 GATE(CLK_MCT, "mct", "aclk100", E4X12_GATE_IP_PERIR, 13,
987 GATE(CLK_RTC, "rtc", "aclk100", E4X12_GATE_IP_PERIR, 15,
989 GATE(CLK_KEYIF, "keyif", "aclk100", E4X12_GATE_IP_PERIR, 16, 0, 0),
990 GATE(CLK_PWM_ISP_SCLK, "pwm_isp_sclk", "div_pwm_isp",
992 GATE(CLK_SPI0_ISP_SCLK, "spi0_isp_sclk", "div_spi0_isp_pre",
994 GATE(CLK_SPI1_ISP_SCLK, "spi1_isp_sclk", "div_spi1_isp_pre",
996 GATE(CLK_UART_ISP_SCLK, "uart_isp_sclk", "div_uart_isp",
998 GATE(CLK_WDT, "watchdog", "aclk100", E4X12_GATE_IP_PERIR, 14, 0, 0),
999 GATE(CLK_PCM0, "pcm0", "aclk100", E4X12_GATE_IP_MAUDIO, 2,
1001 GATE(CLK_I2S0, "i2s0", "aclk100", E4X12_GATE_IP_MAUDIO, 3,
1003 GATE(CLK_G2D, "g2d", "aclk200", GATE_IP_DMC, 23, 0, 0),
1004 GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk200", GATE_IP_DMC, 24, 0, 0),
1005 GATE(CLK_TMU_APBIF, "tmu_apbif", "aclk100", E4X12_GATE_IP_PERIR, 17, 0,