32 	container_of(tx, struct iop_adma_desc_slot, async_tx)
55 	struct dma_async_tx_descriptor *tx = &desc->async_tx;  in iop_adma_run_tx_complete_actions()
85 	if (!async_tx_test_ack(&desc->async_tx))  in iop_adma_clean_slot()
120 			iter->async_tx.cookie, iter->idx, busy,  in __iop_adma_slot_cleanup()
121 			&iter->async_tx.phys, (u64)iop_desc_get_next_desc(iter),  in __iop_adma_slot_cleanup()
122 			async_tx_test_ack(&iter->async_tx));  in __iop_adma_slot_cleanup()
124 		prefetch(&_iter->async_tx);  in __iop_adma_slot_cleanup()
137 		if (iter->async_tx.phys == current_desc) {  in __iop_adma_slot_cleanup()
216 		if (iter->xor_check_result && iter->async_tx.cookie)  in __iop_adma_slot_cleanup()
280 		prefetch(&_iter->async_tx);  in iop_adma_alloc_slots()
312 					(u64)iter->async_tx.phys, slots_per_op);  in iop_adma_alloc_slots()
316 					async_tx_ack(&iter->async_tx);  in iop_adma_alloc_slots()
320 				iter->async_tx.cookie = 0;  in iop_adma_alloc_slots()
333 			alloc_tail->async_tx.cookie = -EBUSY;  in iop_adma_alloc_slots()
383 	next_dma = grp_start->async_tx.phys;  in iop_adma_tx_submit()
400 		__func__, sw_desc->async_tx.cookie, sw_desc->idx);  in iop_adma_tx_submit()
444 		dma_async_tx_descriptor_init(&slot->async_tx, chan);  in iop_adma_alloc_chan_resources()
445 		slot->async_tx.tx_submit = iop_adma_tx_submit;  in iop_adma_alloc_chan_resources()
450 		slot->async_tx.phys = dma_desc + idx * IOP_ADMA_SLOT_SIZE;  in iop_adma_alloc_chan_resources()
498 		sw_desc->async_tx.flags = flags;  in iop_adma_prep_dma_interrupt()
502 	return sw_desc ? &sw_desc->async_tx : NULL;  in iop_adma_prep_dma_interrupt()
529 		sw_desc->async_tx.flags = flags;  in iop_adma_prep_dma_memcpy()
533 	return sw_desc ? &sw_desc->async_tx : NULL;  in iop_adma_prep_dma_memcpy()
561 		sw_desc->async_tx.flags = flags;  in iop_adma_prep_dma_xor()
568 	return sw_desc ? &sw_desc->async_tx : NULL;  in iop_adma_prep_dma_xor()
596 		sw_desc->async_tx.flags = flags;  in iop_adma_prep_dma_xor_val()
603 	return sw_desc ? &sw_desc->async_tx : NULL;  in iop_adma_prep_dma_xor_val()
648 		sw_desc->async_tx.flags = flags;  in iop_adma_prep_dma_pq()
667 	return sw_desc ? &sw_desc->async_tx : NULL;  in iop_adma_prep_dma_pq()
702 		sw_desc->async_tx.flags = flags;  in iop_adma_prep_dma_pq_val()
711 	return sw_desc ? &sw_desc->async_tx : NULL;  in iop_adma_prep_dma_pq_val()
1450 		async_tx_ack(&sw_desc->async_tx);  in iop_chan_start_null_memcpy()
1456 		cookie = dma_cookie_assign(&sw_desc->async_tx);  in iop_chan_start_null_memcpy()
1473 		iop_chan_set_next_descriptor(iop_chan, sw_desc->async_tx.phys);  in iop_chan_start_null_memcpy()
1502 		async_tx_ack(&sw_desc->async_tx);  in iop_chan_start_null_xor()
1509 		cookie = dma_cookie_assign(&sw_desc->async_tx);  in iop_chan_start_null_xor()
1526 		iop_chan_set_next_descriptor(iop_chan, sw_desc->async_tx.phys);  in iop_chan_start_null_xor()