Lines Matching refs:edac_dev
513 struct edac_device_ctl_info *edac_dev; member
519 static void xgene_edac_pmd_l1_check(struct edac_device_ctl_info *edac_dev, in xgene_edac_pmd_l1_check() argument
522 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_l1_check()
531 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
538 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
540 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
543 dev_err(edac_dev->dev, "L1 TLB multiple hit\n"); in xgene_edac_pmd_l1_check()
546 dev_err(edac_dev->dev, "Way select multiple hit\n"); in xgene_edac_pmd_l1_check()
549 dev_err(edac_dev->dev, "Physical tag parity error\n"); in xgene_edac_pmd_l1_check()
553 dev_err(edac_dev->dev, "L1 data parity error\n"); in xgene_edac_pmd_l1_check()
556 dev_err(edac_dev->dev, "L1 pre-decode parity error\n"); in xgene_edac_pmd_l1_check()
565 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_pmd_l1_check()
571 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
578 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
580 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
583 dev_err(edac_dev->dev, "Load tag error\n"); in xgene_edac_pmd_l1_check()
586 dev_err(edac_dev->dev, "Load data error\n"); in xgene_edac_pmd_l1_check()
589 dev_err(edac_dev->dev, "WSL multihit error\n"); in xgene_edac_pmd_l1_check()
592 dev_err(edac_dev->dev, "Store tag error\n"); in xgene_edac_pmd_l1_check()
595 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
599 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
609 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_pmd_l1_check()
615 dev_err(edac_dev->dev, in xgene_edac_pmd_l1_check()
623 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l1_check()
625 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l1_check()
628 dev_err(edac_dev->dev, "Stage 1 UTB hit error\n"); in xgene_edac_pmd_l1_check()
631 dev_err(edac_dev->dev, "Stage 1 UTB miss error\n"); in xgene_edac_pmd_l1_check()
634 dev_err(edac_dev->dev, "Stage 1 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
637 dev_err(edac_dev->dev, "TMO operation single bank error\n"); in xgene_edac_pmd_l1_check()
640 dev_err(edac_dev->dev, "Stage 2 UTB error\n"); in xgene_edac_pmd_l1_check()
643 dev_err(edac_dev->dev, "Stage 2 UTB miss error\n"); in xgene_edac_pmd_l1_check()
646 dev_err(edac_dev->dev, "Stage 2 UTB allocate error\n"); in xgene_edac_pmd_l1_check()
649 dev_err(edac_dev->dev, "TMO operation multiple bank error\n"); in xgene_edac_pmd_l1_check()
656 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_pmd_l1_check()
659 static void xgene_edac_pmd_l2_check(struct edac_device_ctl_info *edac_dev) in xgene_edac_pmd_l2_check() argument
661 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_l2_check()
675 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
678 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
687 dev_err(edac_dev->dev, "One or more correctable error\n"); in xgene_edac_pmd_l2_check()
689 dev_err(edac_dev->dev, "Multiple correctable error\n"); in xgene_edac_pmd_l2_check()
691 dev_err(edac_dev->dev, "One or more uncorrectable error\n"); in xgene_edac_pmd_l2_check()
693 dev_err(edac_dev->dev, "Multiple uncorrectable error\n"); in xgene_edac_pmd_l2_check()
697 dev_err(edac_dev->dev, "Outbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
700 dev_err(edac_dev->dev, "Inbound SDB parity error\n"); in xgene_edac_pmd_l2_check()
703 dev_err(edac_dev->dev, "Tag ECC error\n"); in xgene_edac_pmd_l2_check()
706 dev_err(edac_dev->dev, "Data ECC error\n"); in xgene_edac_pmd_l2_check()
715 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_pmd_l2_check()
718 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_pmd_l2_check()
727 dev_err(edac_dev->dev, in xgene_edac_pmd_l2_check()
734 static void xgene_edac_pmd_check(struct edac_device_ctl_info *edac_dev) in xgene_edac_pmd_check() argument
736 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_check()
746 xgene_edac_pmd_l1_check(edac_dev, i); in xgene_edac_pmd_check()
749 xgene_edac_pmd_l2_check(edac_dev); in xgene_edac_pmd_check()
752 static void xgene_edac_pmd_cpu_hw_cfg(struct edac_device_ctl_info *edac_dev, in xgene_edac_pmd_cpu_hw_cfg() argument
755 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_cpu_hw_cfg()
768 static void xgene_edac_pmd_hw_cfg(struct edac_device_ctl_info *edac_dev) in xgene_edac_pmd_hw_cfg() argument
770 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_hw_cfg()
781 static void xgene_edac_pmd_hw_ctl(struct edac_device_ctl_info *edac_dev, in xgene_edac_pmd_hw_ctl() argument
784 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_hw_ctl()
788 if (edac_dev->op_state == OP_RUNNING_INTERRUPT) { in xgene_edac_pmd_hw_ctl()
798 xgene_edac_pmd_hw_cfg(edac_dev); in xgene_edac_pmd_hw_ctl()
802 xgene_edac_pmd_cpu_hw_cfg(edac_dev, i); in xgene_edac_pmd_hw_ctl()
810 struct edac_device_ctl_info *edac_dev = file->private_data; in xgene_edac_pmd_l1_inject_ctrl_write() local
811 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_l1_inject_ctrl_write()
836 struct edac_device_ctl_info *edac_dev = file->private_data; in xgene_edac_pmd_l2_inject_ctrl_write() local
837 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_l2_inject_ctrl_write()
861 xgene_edac_pmd_create_debugfs_nodes(struct edac_device_ctl_info *edac_dev) in xgene_edac_pmd_create_debugfs_nodes() argument
863 struct xgene_edac_pmd_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pmd_create_debugfs_nodes()
875 edac_debugfs_create_file("l1_inject_ctrl", S_IWUSR, dbgfs_dir, edac_dev, in xgene_edac_pmd_create_debugfs_nodes()
877 edac_debugfs_create_file("l2_inject_ctrl", S_IWUSR, dbgfs_dir, edac_dev, in xgene_edac_pmd_create_debugfs_nodes()
889 struct edac_device_ctl_info *edac_dev; in xgene_edac_pmd_add() local
915 edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx), in xgene_edac_pmd_add()
918 if (!edac_dev) { in xgene_edac_pmd_add()
923 ctx = edac_dev->pvt_info; in xgene_edac_pmd_add()
927 ctx->edac_dev = edac_dev; in xgene_edac_pmd_add()
930 edac_dev->dev = &ctx->ddev; in xgene_edac_pmd_add()
931 edac_dev->ctl_name = ctx->name; in xgene_edac_pmd_add()
932 edac_dev->dev_name = ctx->name; in xgene_edac_pmd_add()
933 edac_dev->mod_name = EDAC_MOD_STR; in xgene_edac_pmd_add()
949 edac_dev->edac_check = xgene_edac_pmd_check; in xgene_edac_pmd_add()
951 xgene_edac_pmd_create_debugfs_nodes(edac_dev); in xgene_edac_pmd_add()
953 rc = edac_device_add_device(edac_dev); in xgene_edac_pmd_add()
961 edac_dev->op_state = OP_RUNNING_INTERRUPT; in xgene_edac_pmd_add()
965 xgene_edac_pmd_hw_ctl(edac_dev, 1); in xgene_edac_pmd_add()
973 edac_device_free_ctl_info(edac_dev); in xgene_edac_pmd_add()
981 struct edac_device_ctl_info *edac_dev = pmd->edac_dev; in xgene_edac_pmd_remove() local
983 xgene_edac_pmd_hw_ctl(edac_dev, 0); in xgene_edac_pmd_remove()
984 edac_device_del_device(edac_dev->dev); in xgene_edac_pmd_remove()
985 edac_device_free_ctl_info(edac_dev); in xgene_edac_pmd_remove()
1021 struct edac_device_ctl_info *edac_dev; member
1053 static void xgene_edac_l3_check(struct edac_device_ctl_info *edac_dev) in xgene_edac_l3_check() argument
1055 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_l3_check()
1066 dev_err(edac_dev->dev, "L3C uncorrectable error\n"); in xgene_edac_l3_check()
1068 dev_warn(edac_dev->dev, "L3C correctable error\n"); in xgene_edac_l3_check()
1074 dev_err(edac_dev->dev, "L3C multiple hit error\n"); in xgene_edac_l3_check()
1076 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1079 dev_err(edac_dev->dev, "L3C multiple uncorrectable error\n"); in xgene_edac_l3_check()
1081 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1085 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1093 dev_err(edac_dev->dev, "L3C error address 0x%08X.%08X bank %d\n", in xgene_edac_l3_check()
1096 dev_err(edac_dev->dev, in xgene_edac_l3_check()
1104 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_l3_check()
1108 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_l3_check()
1110 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_l3_check()
1113 static void xgene_edac_l3_hw_init(struct edac_device_ctl_info *edac_dev, in xgene_edac_l3_hw_init() argument
1116 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_l3_hw_init()
1122 if (edac_dev->op_state == OP_RUNNING_INTERRUPT) { in xgene_edac_l3_hw_init()
1130 if (edac_dev->op_state == OP_RUNNING_INTERRUPT) { in xgene_edac_l3_hw_init()
1150 struct edac_device_ctl_info *edac_dev = file->private_data; in xgene_edac_l3_inject_ctrl_write() local
1151 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_l3_inject_ctrl_write()
1165 xgene_edac_l3_create_debugfs_nodes(struct edac_device_ctl_info *edac_dev) in xgene_edac_l3_create_debugfs_nodes() argument
1167 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_l3_create_debugfs_nodes()
1179 debugfs_create_file("l3_inject_ctrl", S_IWUSR, dbgfs_dir, edac_dev, in xgene_edac_l3_create_debugfs_nodes()
1186 struct edac_device_ctl_info *edac_dev; in xgene_edac_l3_add() local
1210 edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx), in xgene_edac_l3_add()
1213 if (!edac_dev) { in xgene_edac_l3_add()
1218 ctx = edac_dev->pvt_info; in xgene_edac_l3_add()
1223 ctx->edac_dev = edac_dev; in xgene_edac_l3_add()
1226 edac_dev->dev = &ctx->ddev; in xgene_edac_l3_add()
1227 edac_dev->ctl_name = ctx->name; in xgene_edac_l3_add()
1228 edac_dev->dev_name = ctx->name; in xgene_edac_l3_add()
1229 edac_dev->mod_name = EDAC_MOD_STR; in xgene_edac_l3_add()
1232 edac_dev->edac_check = xgene_edac_l3_check; in xgene_edac_l3_add()
1234 xgene_edac_l3_create_debugfs_nodes(edac_dev); in xgene_edac_l3_add()
1236 rc = edac_device_add_device(edac_dev); in xgene_edac_l3_add()
1244 edac_dev->op_state = OP_RUNNING_INTERRUPT; in xgene_edac_l3_add()
1248 xgene_edac_l3_hw_init(edac_dev, 1); in xgene_edac_l3_add()
1256 edac_device_free_ctl_info(edac_dev); in xgene_edac_l3_add()
1264 struct edac_device_ctl_info *edac_dev = l3->edac_dev; in xgene_edac_l3_remove() local
1266 xgene_edac_l3_hw_init(edac_dev, 0); in xgene_edac_l3_remove()
1268 edac_device_free_ctl_info(edac_dev); in xgene_edac_l3_remove()
1388 static void xgene_edac_iob_gic_report(struct edac_device_ctl_info *edac_dev) in xgene_edac_iob_gic_report() argument
1390 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_iob_gic_report()
1400 dev_err(edac_dev->dev, "XGIC transaction error\n"); in xgene_edac_iob_gic_report()
1402 dev_err(edac_dev->dev, "XGIC read size error\n"); in xgene_edac_iob_gic_report()
1404 dev_err(edac_dev->dev, "Multiple XGIC read size error\n"); in xgene_edac_iob_gic_report()
1406 dev_err(edac_dev->dev, "XGIC write size error\n"); in xgene_edac_iob_gic_report()
1408 dev_err(edac_dev->dev, "Multiple XGIC write size error\n"); in xgene_edac_iob_gic_report()
1410 dev_err(edac_dev->dev, "XGIC %s access @ 0x%08X (0x%08X)\n", in xgene_edac_iob_gic_report()
1423 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1432 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1439 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_iob_gic_report()
1444 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1453 dev_err(edac_dev->dev, in xgene_edac_iob_gic_report()
1460 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_iob_gic_report()
1463 static void xgene_edac_rb_report(struct edac_device_ctl_info *edac_dev) in xgene_edac_rb_report() argument
1465 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_rb_report()
1486 dev_err(edac_dev->dev, "IOB bus access error(s)\n"); in xgene_edac_rb_report()
1491 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1495 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1499 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1503 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1518 dev_err(edac_dev->dev, "IOB bridge agent (BA) transaction error\n"); in xgene_edac_rb_report()
1520 dev_err(edac_dev->dev, "IOB BA write response error\n"); in xgene_edac_rb_report()
1522 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1525 dev_err(edac_dev->dev, "IOB BA XGIC poisoned write error\n"); in xgene_edac_rb_report()
1527 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1530 dev_err(edac_dev->dev, "IOB BA RBM poisoned write error\n"); in xgene_edac_rb_report()
1532 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1535 dev_err(edac_dev->dev, "IOB BA write error\n"); in xgene_edac_rb_report()
1537 dev_err(edac_dev->dev, "Multiple IOB BA write error\n"); in xgene_edac_rb_report()
1539 dev_err(edac_dev->dev, "IOB BA transaction error\n"); in xgene_edac_rb_report()
1541 dev_err(edac_dev->dev, "Multiple IOB BA transaction error\n"); in xgene_edac_rb_report()
1543 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1546 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1549 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1552 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1555 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1558 dev_err(edac_dev->dev, in xgene_edac_rb_report()
1563 dev_err(edac_dev->dev, "IOB BA %s access at 0x%02X.%08X (0x%08X)\n", in xgene_edac_rb_report()
1567 dev_err(edac_dev->dev, "IOB BA requestor ID 0x%08X\n", in xgene_edac_rb_report()
1572 static void xgene_edac_pa_report(struct edac_device_ctl_info *edac_dev) in xgene_edac_pa_report() argument
1574 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_pa_report()
1583 dev_err(edac_dev->dev, "IOB processing agent (PA) transaction error\n"); in xgene_edac_pa_report()
1585 dev_err(edac_dev->dev, "IOB PA read data RAM error\n"); in xgene_edac_pa_report()
1587 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1590 dev_err(edac_dev->dev, "IOB PA write data RAM error\n"); in xgene_edac_pa_report()
1592 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1595 dev_err(edac_dev->dev, "IOB PA transaction error\n"); in xgene_edac_pa_report()
1597 dev_err(edac_dev->dev, "Multiple IOB PA transaction error\n"); in xgene_edac_pa_report()
1599 dev_err(edac_dev->dev, "IOB PA transaction ID RAM error\n"); in xgene_edac_pa_report()
1601 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1612 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1626 dev_err(edac_dev->dev, in xgene_edac_pa_report()
1634 static void xgene_edac_soc_check(struct edac_device_ctl_info *edac_dev) in xgene_edac_soc_check() argument
1636 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_soc_check()
1652 xgene_edac_iob_gic_report(edac_dev); in xgene_edac_soc_check()
1655 xgene_edac_rb_report(edac_dev); in xgene_edac_soc_check()
1658 xgene_edac_pa_report(edac_dev); in xgene_edac_soc_check()
1661 dev_info(edac_dev->dev, in xgene_edac_soc_check()
1663 edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_soc_check()
1671 dev_err(edac_dev->dev, "SoC memory parity error 0x%08X\n", in xgene_edac_soc_check()
1673 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); in xgene_edac_soc_check()
1678 dev_err(edac_dev->dev, "%s memory parity error\n", in xgene_edac_soc_check()
1680 edac_device_handle_ue(edac_dev, 0, 0, in xgene_edac_soc_check()
1681 edac_dev->ctl_name); in xgene_edac_soc_check()
1686 static void xgene_edac_soc_hw_init(struct edac_device_ctl_info *edac_dev, in xgene_edac_soc_hw_init() argument
1689 struct xgene_edac_dev_ctx *ctx = edac_dev->pvt_info; in xgene_edac_soc_hw_init()
1692 if (edac_dev->op_state == OP_RUNNING_INTERRUPT) { in xgene_edac_soc_hw_init()
1726 struct edac_device_ctl_info *edac_dev; in xgene_edac_soc_add() local
1750 edac_dev = edac_device_alloc_ctl_info(sizeof(*ctx), in xgene_edac_soc_add()
1753 if (!edac_dev) { in xgene_edac_soc_add()
1758 ctx = edac_dev->pvt_info; in xgene_edac_soc_add()
1763 ctx->edac_dev = edac_dev; in xgene_edac_soc_add()
1766 edac_dev->dev = &ctx->ddev; in xgene_edac_soc_add()
1767 edac_dev->ctl_name = ctx->name; in xgene_edac_soc_add()
1768 edac_dev->dev_name = ctx->name; in xgene_edac_soc_add()
1769 edac_dev->mod_name = EDAC_MOD_STR; in xgene_edac_soc_add()
1772 edac_dev->edac_check = xgene_edac_soc_check; in xgene_edac_soc_add()
1774 rc = edac_device_add_device(edac_dev); in xgene_edac_soc_add()
1782 edac_dev->op_state = OP_RUNNING_INTERRUPT; in xgene_edac_soc_add()
1786 xgene_edac_soc_hw_init(edac_dev, 1); in xgene_edac_soc_add()
1795 edac_device_free_ctl_info(edac_dev); in xgene_edac_soc_add()
1803 struct edac_device_ctl_info *edac_dev = soc->edac_dev; in xgene_edac_soc_remove() local
1805 xgene_edac_soc_hw_init(edac_dev, 0); in xgene_edac_soc_remove()
1807 edac_device_free_ctl_info(edac_dev); in xgene_edac_soc_remove()
1832 xgene_edac_pmd_check(pmd->edac_dev); in xgene_edac_isr()
1836 xgene_edac_l3_check(node->edac_dev); in xgene_edac_isr()
1839 xgene_edac_soc_check(node->edac_dev); in xgene_edac_isr()