48 	u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes;  in amdgpu_gmc_pdb0_alloc()
49 	uint32_t pde0_page_shift = adev->gmc.vmid0_page_table_block_size + 21;  in amdgpu_gmc_pdb0_alloc()
62 	r = amdgpu_bo_create(adev, &bp, &adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
66 	r = amdgpu_bo_reserve(adev->gmc.pdb0_bo, false);  in amdgpu_gmc_pdb0_alloc()
70 	r = amdgpu_bo_pin(adev->gmc.pdb0_bo, AMDGPU_GEM_DOMAIN_VRAM);  in amdgpu_gmc_pdb0_alloc()
73 	r = amdgpu_bo_kmap(adev->gmc.pdb0_bo, &adev->gmc.ptr_pdb0);  in amdgpu_gmc_pdb0_alloc()
77 	amdgpu_bo_unreserve(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
81 	amdgpu_bo_unpin(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
83 	amdgpu_bo_unreserve(adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
85 	amdgpu_bo_unref(&adev->gmc.pdb0_bo);  in amdgpu_gmc_pdb0_alloc()
188 	if (bo->ttm->dma_address[0] + PAGE_SIZE >= adev->gmc.agp_size)  in amdgpu_gmc_agp_addr()
191 	return adev->gmc.agp_start + bo->ttm->dma_address[0];  in amdgpu_gmc_agp_addr()
271 	u64 max_mc_address = min(adev->gmc.mc_mask, AMDGPU_GMC_HOLE_START - 1);  in amdgpu_gmc_gart_location()
370 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_filter_faults()  local
378 	if (gmc->fault_ring[gmc->last_fault].timestamp >= stamp)  in amdgpu_gmc_filter_faults()
383 	fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];  in amdgpu_gmc_filter_faults()
391 		fault = &gmc->fault_ring[fault->next];  in amdgpu_gmc_filter_faults()
399 	fault = &gmc->fault_ring[gmc->last_fault];  in amdgpu_gmc_filter_faults()
404 	fault->next = gmc->fault_hash[hash].idx;  in amdgpu_gmc_filter_faults()
405 	gmc->fault_hash[hash].idx = gmc->last_fault++;  in amdgpu_gmc_filter_faults()
422 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_filter_faults_remove()  local
429 	fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];  in amdgpu_gmc_filter_faults_remove()
435 		fault = &gmc->fault_ring[fault->next];  in amdgpu_gmc_filter_faults_remove()
457 	if (!adev->gmc.xgmi.connected_to_cpu)  in amdgpu_gmc_ras_late_init()
458 		adev->gmc.xgmi.ras_funcs = &xgmi_ras_funcs;  in amdgpu_gmc_ras_late_init()
460 	if (adev->gmc.xgmi.ras_funcs &&  in amdgpu_gmc_ras_late_init()
461 	    adev->gmc.xgmi.ras_funcs->ras_late_init) {  in amdgpu_gmc_ras_late_init()
462 		r = adev->gmc.xgmi.ras_funcs->ras_late_init(adev);  in amdgpu_gmc_ras_late_init()
508 	if (adev->gmc.xgmi.ras_funcs &&  in amdgpu_gmc_ras_fini()
509 	    adev->gmc.xgmi.ras_funcs->ras_fini)  in amdgpu_gmc_ras_fini()
510 		adev->gmc.xgmi.ras_funcs->ras_fini(adev);  in amdgpu_gmc_ras_fini()
573 			adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
577 			adev->gmc.tmz_enabled = true;  in amdgpu_gmc_tmz_set()
590 			adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
594 			adev->gmc.tmz_enabled = true;  in amdgpu_gmc_tmz_set()
600 		adev->gmc.tmz_enabled = false;  in amdgpu_gmc_tmz_set()
616 	struct amdgpu_gmc *gmc = &adev->gmc;  in amdgpu_gmc_noretry_set()  local
628 			gmc->noretry = 1;  in amdgpu_gmc_noretry_set()
630 			gmc->noretry = amdgpu_noretry;  in amdgpu_gmc_noretry_set()
646 			gmc->noretry = 0;  in amdgpu_gmc_noretry_set()
648 			gmc->noretry = amdgpu_noretry;  in amdgpu_gmc_noretry_set()
712 	if ((adev->gmc.real_vram_size - size) < (8 * 1024 * 1024))  in amdgpu_gmc_get_vbios_allocations()
746 	u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes;  in amdgpu_gmc_init_pdb0()
747 	u64 pde0_page_size = (1ULL<<adev->gmc.vmid0_page_table_block_size)<<21;  in amdgpu_gmc_init_pdb0()
749 		adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size;  in amdgpu_gmc_init_pdb0()
756 	flags |= AMDGPU_PTE_FRAG((adev->gmc.vmid0_page_table_block_size + 9*1));  in amdgpu_gmc_init_pdb0()
763 		amdgpu_gmc_set_pte_pde(adev, adev->gmc.ptr_pdb0, i, vram_addr, flags);  in amdgpu_gmc_init_pdb0()
772 	amdgpu_gmc_set_pte_pde(adev, adev->gmc.ptr_pdb0, i, gart_ptb_gpu_pa, flags);  in amdgpu_gmc_init_pdb0()
784 	return mc_addr - adev->gmc.vram_start + adev->vm_manager.vram_base_offset;  in amdgpu_gmc_vram_mc2pa()
808 	return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.aper_base;  in amdgpu_gmc_vram_cpu_pa()