52 	ih->rptr = 0;  in amdgpu_ih_ring_init()
161 	if (wptr != READ_ONCE(ih->rptr)) {  in amdgpu_ih_ring_write()
173 	uint32_t cur_rptr = ih->rptr | (*prev_rptr & ~ih->ptr_mask);  in amdgpu_ih_has_checkpoint_processed()
196 	uint32_t checkpoint_wptr, rptr;  in amdgpu_ih_wait_on_checkpoint_process()  local
204 	rptr = READ_ONCE(ih->rptr);  in amdgpu_ih_wait_on_checkpoint_process()
207 	if (rptr > checkpoint_wptr)  in amdgpu_ih_wait_on_checkpoint_process()
212 						checkpoint_wptr, &rptr));  in amdgpu_ih_wait_on_checkpoint_process()
236 	DRM_DEBUG("%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr);  in amdgpu_ih_process()
241 	while (ih->rptr != wptr && --count) {  in amdgpu_ih_process()
243 		ih->rptr &= ih->ptr_mask;  in amdgpu_ih_process()
251 	if (wptr != ih->rptr)  in amdgpu_ih_process()
273 	u32 ring_index = ih->rptr >> 2;  in amdgpu_ih_decode_iv_helper()
300 	ih->rptr += 32;  in amdgpu_ih_decode_iv_helper()