Lines Matching refs:data1
568 uint32_t def, data, def1, data1; in mmhub_v2_0_update_medium_grain_clock_gating() local
579 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid); in mmhub_v2_0_update_medium_grain_clock_gating()
583 def1 = data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_update_medium_grain_clock_gating()
590 data1 &= ~(DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
600 data1 |= (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_update_medium_grain_clock_gating()
615 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
616 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
621 if (def1 != data1) in mmhub_v2_0_update_medium_grain_clock_gating()
622 WREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2, data1); in mmhub_v2_0_update_medium_grain_clock_gating()
695 int data, data1; in mmhub_v2_0_get_clockgating() local
706 data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2_Sienna_Cichlid); in mmhub_v2_0_get_clockgating()
710 data1 = RREG32_SOC15(MMHUB, 0, mmDAGB0_CNTL_MISC2); in mmhub_v2_0_get_clockgating()
716 !(data1 & (DAGB0_CNTL_MISC2__DISABLE_WRREQ_CG_MASK | in mmhub_v2_0_get_clockgating()