Lines Matching refs:wptr
323 ret = ring->wptr & ring->buf_mask;/* this is the offset we need patch later */ in sdma_v5_0_ring_init_cond_exec()
337 cur = (ring->wptr - 1) & ring->buf_mask; in sdma_v5_0_ring_patch_cond_exec()
372 u64 wptr; in sdma_v5_0_ring_get_wptr() local
376 wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs])); in sdma_v5_0_ring_get_wptr()
377 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr); in sdma_v5_0_ring_get_wptr()
379 wptr = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)); in sdma_v5_0_ring_get_wptr()
380 wptr = wptr << 32; in sdma_v5_0_ring_get_wptr()
381 wptr |= RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)); in sdma_v5_0_ring_get_wptr()
382 DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr); in sdma_v5_0_ring_get_wptr()
385 return wptr >> 2; in sdma_v5_0_ring_get_wptr()
406 lower_32_bits(ring->wptr << 2), in sdma_v5_0_ring_set_wptr()
407 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
409 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
410 adev->wb.wb[ring->wptr_offs + 1] = upper_32_bits(ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
412 ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
413 WDOORBELL64(ring->doorbell_index, ring->wptr << 2); in sdma_v5_0_ring_set_wptr()
419 lower_32_bits(ring->wptr << 2), in sdma_v5_0_ring_set_wptr()
421 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
423 lower_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
425 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_ring_set_wptr()
468 sdma_v5_0_ring_insert_nop(ring, (2 - lower_32_bits(ring->wptr)) & 7); in sdma_v5_0_ring_emit_ib()
778 ring->wptr = 0; in sdma_v5_0_gfx_resume()
785 lower_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume()
787 upper_32_bits(ring->wptr << 2)); in sdma_v5_0_gfx_resume()