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Lines Matching refs:wptr

918 	ring->wptr = RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR);  in vcn_v2_0_start_dpg_mode()
920 lower_32_bits(ring->wptr)); in vcn_v2_0_start_dpg_mode()
1076 ring->wptr = RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR); in vcn_v2_0_start()
1078 lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1083 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1084 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1092 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1093 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_start()
1234 ring->wptr = 0; in vcn_v2_0_pause_dpg_mode()
1238 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1239 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1244 ring->wptr = 0; in vcn_v2_0_pause_dpg_mode()
1248 WREG32_SOC15(UVD, 0, mmUVD_RB_RPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1249 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_pause_dpg_mode()
1358 lower_32_bits(ring->wptr) | 0x80000000); in vcn_v2_0_dec_ring_set_wptr()
1361 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v2_0_dec_ring_set_wptr()
1362 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v2_0_dec_ring_set_wptr()
1364 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_dec_ring_set_wptr()
1413 WARN_ON(ring->wptr % 2 || count % 2); in vcn_v2_0_dec_ring_insert_nop()
1593 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v2_0_enc_ring_set_wptr()
1594 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1596 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1600 adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr); in vcn_v2_0_enc_ring_set_wptr()
1601 WDOORBELL32(ring->doorbell_index, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1603 WREG32_SOC15(UVD, 0, mmUVD_RB_WPTR2, lower_32_bits(ring->wptr)); in vcn_v2_0_enc_ring_set_wptr()
1816 adev->vcn.inst->ring_dec.wptr = 0; in vcn_v2_0_start_mmsch()
1821 adev->vcn.inst->ring_enc[i].wptr = 0; in vcn_v2_0_start_mmsch()
1949 ring->wptr = 0; in vcn_v2_0_start_sriov()
1962 ring->wptr = 0; in vcn_v2_0_start_sriov()