54 	if (adev->irq.ih.ring_size) {  in vega20_ih_init_register_offset()
55 		ih_regs = &adev->irq.ih.ih_regs;  in vega20_ih_init_register_offset()
100 					    struct amdgpu_ih_ring *ih,  in vega20_ih_toggle_ring_interrupts()  argument
106 	ih_regs = &ih->ih_regs;  in vega20_ih_toggle_ring_interrupts()
113 	if (ih == &adev->irq.ih)  in vega20_ih_toggle_ring_interrupts()
125 		ih->enabled = true;  in vega20_ih_toggle_ring_interrupts()
130 		ih->enabled = false;  in vega20_ih_toggle_ring_interrupts()
131 		ih->rptr = 0;  in vega20_ih_toggle_ring_interrupts()
147 	struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2};  in vega20_ih_toggle_interrupts()  local
151 	for (i = 0; i < ARRAY_SIZE(ih); i++) {  in vega20_ih_toggle_interrupts()
152 		if (ih[i]->ring_size) {  in vega20_ih_toggle_interrupts()
153 			r = vega20_ih_toggle_ring_interrupts(adev, ih[i], enable);  in vega20_ih_toggle_interrupts()
162 static uint32_t vega20_ih_rb_cntl(struct amdgpu_ih_ring *ih, uint32_t ih_rb_cntl)  in vega20_ih_rb_cntl()  argument
164 	int rb_bufsz = order_base_2(ih->ring_size / 4);  in vega20_ih_rb_cntl()
167 				   MC_SPACE, ih->use_bus_addr ? 1 : 4);  in vega20_ih_rb_cntl()
185 static uint32_t vega20_ih_doorbell_rptr(struct amdgpu_ih_ring *ih)  in vega20_ih_doorbell_rptr()  argument
189 	if (ih->use_doorbell) {  in vega20_ih_doorbell_rptr()
192 						 ih->doorbell_index);  in vega20_ih_doorbell_rptr()
213 				 struct amdgpu_ih_ring *ih)  in vega20_ih_enable_ring()  argument
218 	ih_regs = &ih->ih_regs;  in vega20_ih_enable_ring()
221 	WREG32(ih_regs->ih_rb_base, ih->gpu_addr >> 8);  in vega20_ih_enable_ring()
222 	WREG32(ih_regs->ih_rb_base_hi, (ih->gpu_addr >> 40) & 0xff);  in vega20_ih_enable_ring()
225 	tmp = vega20_ih_rb_cntl(ih, tmp);  in vega20_ih_enable_ring()
226 	if (ih == &adev->irq.ih)  in vega20_ih_enable_ring()
228 	if (ih == &adev->irq.ih1)  in vega20_ih_enable_ring()
239 	if (ih == &adev->irq.ih) {  in vega20_ih_enable_ring()
241 		WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr));  in vega20_ih_enable_ring()
242 		WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF);  in vega20_ih_enable_ring()
249 	WREG32(ih_regs->ih_doorbell_rptr, vega20_ih_doorbell_rptr(ih));  in vega20_ih_enable_ring()
299 	struct amdgpu_ih_ring *ih[] = {&adev->irq.ih, &adev->irq.ih1, &adev->irq.ih2};  in vega20_ih_irq_init()  local
314 		if (adev->irq.ih.use_bus_addr) {  in vega20_ih_irq_init()
326 		if (adev->irq.ih.use_bus_addr) {  in vega20_ih_irq_init()
333 	for (i = 0; i < ARRAY_SIZE(ih); i++) {  in vega20_ih_irq_init()
334 		if (ih[i]->ring_size) {  in vega20_ih_irq_init()
337 			ret = vega20_ih_enable_ring(adev, ih[i]);  in vega20_ih_irq_init()
344 		adev->nbio.funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,  in vega20_ih_irq_init()
345 						    adev->irq.ih.doorbell_index);  in vega20_ih_irq_init()
387 			      struct amdgpu_ih_ring *ih)  in vega20_ih_get_wptr()  argument
392 	if (ih == &adev->irq.ih) {  in vega20_ih_get_wptr()
396 		wptr = le32_to_cpu(*ih->wptr_cpu);  in vega20_ih_get_wptr()
402 	ih_regs = &ih->ih_regs;  in vega20_ih_get_wptr()
415 	tmp = (wptr + 32) & ih->ptr_mask;  in vega20_ih_get_wptr()
418 		 wptr, ih->rptr, tmp);  in vega20_ih_get_wptr()
419 	ih->rptr = tmp;  in vega20_ih_get_wptr()
426 	return (wptr & ih->ptr_mask);  in vega20_ih_get_wptr()
437 			       struct amdgpu_ih_ring *ih)  in vega20_ih_irq_rearm()  argument
443 	ih_regs = &ih->ih_regs;  in vega20_ih_irq_rearm()
448 		if ((v < ih->ring_size) && (v != ih->rptr))  in vega20_ih_irq_rearm()
449 			WDOORBELL32(ih->doorbell_index, ih->rptr);  in vega20_ih_irq_rearm()
464 			       struct amdgpu_ih_ring *ih)  in vega20_ih_set_rptr()  argument
468 	if (ih->use_doorbell) {  in vega20_ih_set_rptr()
470 		*ih->rptr_cpu = ih->rptr;  in vega20_ih_set_rptr()
471 		WDOORBELL32(ih->doorbell_index, ih->rptr);  in vega20_ih_set_rptr()
474 			vega20_ih_irq_rearm(adev, ih);  in vega20_ih_set_rptr()
476 		ih_regs = &ih->ih_regs;  in vega20_ih_set_rptr()
477 		WREG32(ih_regs->ih_rb_rptr, ih->rptr);  in vega20_ih_set_rptr()
535 	r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 256 * 1024, true);  in vega20_ih_sw_init()
539 	adev->irq.ih.use_doorbell = true;  in vega20_ih_sw_init()
540 	adev->irq.ih.doorbell_index = adev->doorbell_index.ih << 1;  in vega20_ih_sw_init()
547 	adev->irq.ih1.doorbell_index = (adev->doorbell_index.ih + 1) << 1;  in vega20_ih_sw_init()
554 	adev->irq.ih2.doorbell_index = (adev->doorbell_index.ih + 2) << 1;  in vega20_ih_sw_init()