597 static void dce120_resource_destruct(struct dce110_resource_pool *pool)  in dce120_resource_destruct()  argument
601 	for (i = 0; i < pool->base.pipe_count; i++) {  in dce120_resource_destruct()
602 		if (pool->base.opps[i] != NULL)  in dce120_resource_destruct()
603 			dce110_opp_destroy(&pool->base.opps[i]);  in dce120_resource_destruct()
605 		if (pool->base.transforms[i] != NULL)  in dce120_resource_destruct()
606 			dce120_transform_destroy(&pool->base.transforms[i]);  in dce120_resource_destruct()
608 		if (pool->base.ipps[i] != NULL)  in dce120_resource_destruct()
609 			dce_ipp_destroy(&pool->base.ipps[i]);  in dce120_resource_destruct()
611 		if (pool->base.mis[i] != NULL) {  in dce120_resource_destruct()
612 			kfree(TO_DCE_MEM_INPUT(pool->base.mis[i]));  in dce120_resource_destruct()
613 			pool->base.mis[i] = NULL;  in dce120_resource_destruct()
616 		if (pool->base.irqs != NULL) {  in dce120_resource_destruct()
617 			dal_irq_service_destroy(&pool->base.irqs);  in dce120_resource_destruct()
620 		if (pool->base.timing_generators[i] != NULL) {  in dce120_resource_destruct()
621 			kfree(DCE110TG_FROM_TG(pool->base.timing_generators[i]));  in dce120_resource_destruct()
622 			pool->base.timing_generators[i] = NULL;  in dce120_resource_destruct()
626 	for (i = 0; i < pool->base.res_cap->num_ddc; i++) {  in dce120_resource_destruct()
627 		if (pool->base.engines[i] != NULL)  in dce120_resource_destruct()
628 			dce110_engine_destroy(&pool->base.engines[i]);  in dce120_resource_destruct()
629 		if (pool->base.hw_i2cs[i] != NULL) {  in dce120_resource_destruct()
630 			kfree(pool->base.hw_i2cs[i]);  in dce120_resource_destruct()
631 			pool->base.hw_i2cs[i] = NULL;  in dce120_resource_destruct()
633 		if (pool->base.sw_i2cs[i] != NULL) {  in dce120_resource_destruct()
634 			kfree(pool->base.sw_i2cs[i]);  in dce120_resource_destruct()
635 			pool->base.sw_i2cs[i] = NULL;  in dce120_resource_destruct()
639 	for (i = 0; i < pool->base.audio_count; i++) {  in dce120_resource_destruct()
640 		if (pool->base.audios[i])  in dce120_resource_destruct()
641 			dce_aud_destroy(&pool->base.audios[i]);  in dce120_resource_destruct()
644 	for (i = 0; i < pool->base.stream_enc_count; i++) {  in dce120_resource_destruct()
645 		if (pool->base.stream_enc[i] != NULL)  in dce120_resource_destruct()
646 			kfree(DCE110STRENC_FROM_STRENC(pool->base.stream_enc[i]));  in dce120_resource_destruct()
649 	for (i = 0; i < pool->base.clk_src_count; i++) {  in dce120_resource_destruct()
650 		if (pool->base.clock_sources[i] != NULL)  in dce120_resource_destruct()
652 				&pool->base.clock_sources[i]);  in dce120_resource_destruct()
655 	if (pool->base.dp_clock_source != NULL)  in dce120_resource_destruct()
656 		dce120_clock_source_destroy(&pool->base.dp_clock_source);  in dce120_resource_destruct()
658 	if (pool->base.abm != NULL)  in dce120_resource_destruct()
659 		dce_abm_destroy(&pool->base.abm);  in dce120_resource_destruct()
661 	if (pool->base.dmcu != NULL)  in dce120_resource_destruct()
662 		dce_dmcu_destroy(&pool->base.dmcu);  in dce120_resource_destruct()
895 static void dce120_destroy_resource_pool(struct resource_pool **pool)  in dce120_destroy_resource_pool()  argument
897 	struct dce110_resource_pool *dce110_pool = TO_DCE110_RES_POOL(*pool);  in dce120_destroy_resource_pool()
901 	*pool = NULL;  in dce120_destroy_resource_pool()
1055 	struct dce110_resource_pool *pool)  in dce120_resource_construct()  argument
1067 	pool->base.res_cap = &res_cap;  in dce120_resource_construct()
1068 	pool->base.funcs = &dce120_res_pool_funcs;  in dce120_resource_construct()
1071 	pool->base.pipe_count = res_cap.num_timing_generator;  in dce120_resource_construct()
1072 	pool->base.timing_generator_count = pool->base.res_cap->num_timing_generator;  in dce120_resource_construct()
1073 	pool->base.underlay_pipe_index = NO_UNDERLAY_PIPE;  in dce120_resource_construct()
1089 	pool->base.clock_sources[DCE120_CLK_SRC_PLL0] =  in dce120_resource_construct()
1093 	pool->base.clock_sources[DCE120_CLK_SRC_PLL1] =  in dce120_resource_construct()
1097 	pool->base.clock_sources[DCE120_CLK_SRC_PLL2] =  in dce120_resource_construct()
1101 	pool->base.clock_sources[DCE120_CLK_SRC_PLL3] =  in dce120_resource_construct()
1105 	pool->base.clock_sources[DCE120_CLK_SRC_PLL4] =  in dce120_resource_construct()
1109 	pool->base.clock_sources[DCE120_CLK_SRC_PLL5] =  in dce120_resource_construct()
1113 	pool->base.clk_src_count = DCE120_CLK_SRC_TOTAL;  in dce120_resource_construct()
1115 	pool->base.dp_clock_source =  in dce120_resource_construct()
1120 	for (i = 0; i < pool->base.clk_src_count; i++) {  in dce120_resource_construct()
1121 		if (pool->base.clock_sources[i] == NULL) {  in dce120_resource_construct()
1128 	pool->base.dmcu = dce_dmcu_create(ctx,  in dce120_resource_construct()
1132 	if (pool->base.dmcu == NULL) {  in dce120_resource_construct()
1138 	pool->base.abm = dce_abm_create(ctx,  in dce120_resource_construct()
1142 	if (pool->base.abm == NULL) {  in dce120_resource_construct()
1150 	pool->base.irqs = dal_irq_service_dce120_create(&irq_init_data);  in dce120_resource_construct()
1151 	if (!pool->base.irqs)  in dce120_resource_construct()
1160 	for (i = 0; i < pool->base.pipe_count; i++) {  in dce120_resource_construct()
1168 		pool->base.timing_generators[j] =  in dce120_resource_construct()
1173 		if (pool->base.timing_generators[j] == NULL) {  in dce120_resource_construct()
1179 		pool->base.mis[j] = dce120_mem_input_create(ctx, i);  in dce120_resource_construct()
1181 		if (pool->base.mis[j] == NULL) {  in dce120_resource_construct()
1188 		pool->base.ipps[j] = dce120_ipp_create(ctx, i);  in dce120_resource_construct()
1189 		if (pool->base.ipps[i] == NULL) {  in dce120_resource_construct()
1196 		pool->base.transforms[j] = dce120_transform_create(ctx, i);  in dce120_resource_construct()
1197 		if (pool->base.transforms[i] == NULL) {  in dce120_resource_construct()
1204 		pool->base.opps[j] = dce120_opp_create(  in dce120_resource_construct()
1207 		if (pool->base.opps[j] == NULL) {  in dce120_resource_construct()
1217 	for (i = 0; i < pool->base.res_cap->num_ddc; i++) {  in dce120_resource_construct()
1218 		pool->base.engines[i] = dce120_aux_engine_create(ctx, i);  in dce120_resource_construct()
1219 		if (pool->base.engines[i] == NULL) {  in dce120_resource_construct()
1225 		pool->base.hw_i2cs[i] = dce120_i2c_hw_create(ctx, i);  in dce120_resource_construct()
1226 		if (pool->base.hw_i2cs[i] == NULL) {  in dce120_resource_construct()
1232 		pool->base.sw_i2cs[i] = NULL;  in dce120_resource_construct()
1236 	pool->base.pipe_count = j;  in dce120_resource_construct()
1237 	pool->base.timing_generator_count = j;  in dce120_resource_construct()
1244 	if (!resource_construct(num_virtual_links, dc, &pool->base, res_funcs))  in dce120_resource_construct()
1251 	dc->caps.max_planes =  pool->base.pipe_count;  in dce120_resource_construct()
1267 	dce120_resource_destruct(pool);  in dce120_resource_construct()
1276 	struct dce110_resource_pool *pool =  in dce120_create_resource_pool()  local
1279 	if (!pool)  in dce120_create_resource_pool()
1282 	if (dce120_resource_construct(num_virtual_links, dc, pool))  in dce120_create_resource_pool()
1283 		return &pool->base;  in dce120_create_resource_pool()
1285 	kfree(pool);  in dce120_create_resource_pool()