77 	uint16_t table_offset = get_vce_table_offset(hwmgr,  in get_vce_clock_info_array_offset()  local
80 	if (table_offset > 0)  in get_vce_clock_info_array_offset()
81 		return table_offset + 1;  in get_vce_clock_info_array_offset()
89 	uint16_t table_offset = get_vce_clock_info_array_offset(hwmgr,  in get_vce_clock_info_array_size()  local
93 	if (table_offset > 0) {  in get_vce_clock_info_array_size()
95 			(((unsigned long) powerplay_table) + table_offset);  in get_vce_clock_info_array_size()
105 	uint16_t table_offset = get_vce_clock_info_array_offset(hwmgr,  in get_vce_clock_voltage_limit_table_offset()  local
108 	if (table_offset > 0)  in get_vce_clock_voltage_limit_table_offset()
109 		return table_offset + get_vce_clock_info_array_size(hwmgr,  in get_vce_clock_voltage_limit_table_offset()
118 	uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table);  in get_vce_clock_voltage_limit_table_size()  local
121 	if (table_offset > 0) {  in get_vce_clock_voltage_limit_table_size()
123 …onst ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table *)(((unsigned long) powerplay_table) + table_offset);  in get_vce_clock_voltage_limit_table_size()
132 	uint16_t table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr, powerplay_table);  in get_vce_state_table_offset()  local
134 	if (table_offset > 0)  in get_vce_state_table_offset()
135 		return table_offset + get_vce_clock_voltage_limit_table_size(hwmgr, powerplay_table);  in get_vce_state_table_offset()
144 	uint16_t table_offset = get_vce_state_table_offset(hwmgr, powerplay_table);  in get_vce_state_table()  local
146 	if (table_offset > 0)  in get_vce_state_table()
147 		return (const ATOM_PPLIB_VCE_State_Table *)(((unsigned long) powerplay_table) + table_offset);  in get_vce_state_table()
177 	uint16_t table_offset = get_uvd_table_offset(hwmgr,  in get_uvd_clock_info_array_offset()  local
180 	if (table_offset > 0)  in get_uvd_clock_info_array_offset()
181 		return table_offset + 1;  in get_uvd_clock_info_array_offset()
188 	uint16_t table_offset = get_uvd_clock_info_array_offset(hwmgr,  in get_uvd_clock_info_array_size()  local
192 	if (table_offset > 0) {  in get_uvd_clock_info_array_size()
195 					+ table_offset);  in get_uvd_clock_info_array_size()
207 	uint16_t table_offset = get_uvd_clock_info_array_offset(hwmgr,  in get_uvd_clock_voltage_limit_table_offset()  local
210 	if (table_offset > 0)  in get_uvd_clock_voltage_limit_table_offset()
211 		return table_offset +  in get_uvd_clock_voltage_limit_table_offset()
244 	uint16_t table_offset = get_samu_table_offset(hwmgr,  in get_samu_clock_voltage_limit_table_offset()  local
247 	if (table_offset > 0)  in get_samu_clock_voltage_limit_table_offset()
248 		return table_offset + 1;  in get_samu_clock_voltage_limit_table_offset()
1322 	uint16_t table_offset;  in init_clock_voltage_dependency()  local
1338 	table_offset = get_vce_clock_voltage_limit_table_offset(hwmgr,  in init_clock_voltage_dependency()
1340 	if (vce_clock_info_array_offset > 0 && table_offset > 0) {  in init_clock_voltage_dependency()
1346 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1353 	table_offset = get_uvd_clock_voltage_limit_table_offset(hwmgr, powerplay_table);  in init_clock_voltage_dependency()
1355 	if (uvd_clock_info_array_offset > 0 && table_offset > 0) {  in init_clock_voltage_dependency()
1361 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1366 	table_offset = get_samu_clock_voltage_limit_table_offset(hwmgr,  in init_clock_voltage_dependency()
1369 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1372 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1377 	table_offset = get_acp_clock_voltage_limit_table_offset(hwmgr,  in init_clock_voltage_dependency()
1380 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1383 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1388 	table_offset = get_cacp_tdp_table_offset(hwmgr, powerplay_table);  in init_clock_voltage_dependency()
1389 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1390 		UCHAR rev_id = *(UCHAR *)(((unsigned long)powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1395 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1404 				(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1467 	table_offset = get_sclk_vdd_gfx_clock_voltage_dependency_table_offset(hwmgr,  in init_clock_voltage_dependency()
1470 	if (table_offset > 0) {  in init_clock_voltage_dependency()
1472 			(((unsigned long) powerplay_table) + table_offset);  in init_clock_voltage_dependency()
1553 		uint16_t table_offset;  in init_dpm2_parameters()  local
1599 				table_offset = le16_to_cpu(extended_header->usPPMTableOffset);  in init_dpm2_parameters()
1601 					(((unsigned long)powerplay_table) + table_offset);  in init_dpm2_parameters()