179 	struct psb_save_area *regs = &dev_priv->regs;  in oaktrail_save_display_registers()  local
180 	struct psb_pipe *p = &regs->pipe[0];  in oaktrail_save_display_registers()
185 	regs->psb.saveDSPARB = PSB_RVDC32(DSPARB);  in oaktrail_save_display_registers()
186 	regs->psb.saveDSPFW1 = PSB_RVDC32(DSPFW1);  in oaktrail_save_display_registers()
187 	regs->psb.saveDSPFW2 = PSB_RVDC32(DSPFW2);  in oaktrail_save_display_registers()
188 	regs->psb.saveDSPFW3 = PSB_RVDC32(DSPFW3);  in oaktrail_save_display_registers()
189 	regs->psb.saveDSPFW4 = PSB_RVDC32(DSPFW4);  in oaktrail_save_display_registers()
190 	regs->psb.saveDSPFW5 = PSB_RVDC32(DSPFW5);  in oaktrail_save_display_registers()
191 	regs->psb.saveDSPFW6 = PSB_RVDC32(DSPFW6);  in oaktrail_save_display_registers()
192 	regs->psb.saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);  in oaktrail_save_display_registers()
206 	regs->psb.saveBCLRPAT_A = PSB_RVDC32(BCLRPAT_A);  in oaktrail_save_display_registers()
215 	regs->psb.saveDSPACURSOR_CTRL = PSB_RVDC32(CURACNTR);  in oaktrail_save_display_registers()
216 	regs->psb.saveDSPACURSOR_BASE = PSB_RVDC32(CURABASE);  in oaktrail_save_display_registers()
217 	regs->psb.saveDSPACURSOR_POS = PSB_RVDC32(CURAPOS);  in oaktrail_save_display_registers()
227 	regs->psb.savePERF_MODE = PSB_RVDC32(MRST_PERF_MODE);  in oaktrail_save_display_registers()
230 	regs->psb.savePP_CONTROL = PSB_RVDC32(PP_CONTROL);  in oaktrail_save_display_registers()
231 	regs->psb.savePFIT_PGM_RATIOS = PSB_RVDC32(PFIT_PGM_RATIOS);  in oaktrail_save_display_registers()
232 	regs->psb.savePFIT_AUTO_RATIOS = PSB_RVDC32(PFIT_AUTO_RATIOS);  in oaktrail_save_display_registers()
233 	regs->saveBLC_PWM_CTL = PSB_RVDC32(BLC_PWM_CTL);  in oaktrail_save_display_registers()
234 	regs->saveBLC_PWM_CTL2 = PSB_RVDC32(BLC_PWM_CTL2);  in oaktrail_save_display_registers()
235 	regs->psb.saveLVDS = PSB_RVDC32(LVDS);  in oaktrail_save_display_registers()
236 	regs->psb.savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL);  in oaktrail_save_display_registers()
237 	regs->psb.savePP_ON_DELAYS = PSB_RVDC32(LVDSPP_ON);  in oaktrail_save_display_registers()
238 	regs->psb.savePP_OFF_DELAYS = PSB_RVDC32(LVDSPP_OFF);  in oaktrail_save_display_registers()
239 	regs->psb.savePP_DIVISOR = PSB_RVDC32(PP_CYCLE);  in oaktrail_save_display_registers()
242 	regs->psb.saveOV_OVADD = PSB_RVDC32(OV_OVADD);  in oaktrail_save_display_registers()
243 	regs->psb.saveOV_OGAMC0 = PSB_RVDC32(OV_OGAMC0);  in oaktrail_save_display_registers()
244 	regs->psb.saveOV_OGAMC1 = PSB_RVDC32(OV_OGAMC1);  in oaktrail_save_display_registers()
245 	regs->psb.saveOV_OGAMC2 = PSB_RVDC32(OV_OGAMC2);  in oaktrail_save_display_registers()
246 	regs->psb.saveOV_OGAMC3 = PSB_RVDC32(OV_OGAMC3);  in oaktrail_save_display_registers()
247 	regs->psb.saveOV_OGAMC4 = PSB_RVDC32(OV_OGAMC4);  in oaktrail_save_display_registers()
248 	regs->psb.saveOV_OGAMC5 = PSB_RVDC32(OV_OGAMC5);  in oaktrail_save_display_registers()
251 	regs->psb.saveHISTOGRAM_INT_CONTROL_REG =  in oaktrail_save_display_registers()
253 	regs->psb.saveHISTOGRAM_LOGIC_CONTROL_REG =  in oaktrail_save_display_registers()
255 	regs->psb.savePWM_CONTROL_LOGIC = PSB_RVDC32(PWM_CONTROL_LOGIC);  in oaktrail_save_display_registers()
293 	struct psb_save_area *regs = &dev_priv->regs;  in oaktrail_restore_display_registers()  local
294 	struct psb_pipe *p = &regs->pipe[0];  in oaktrail_restore_display_registers()
299 	PSB_WVDC32(regs->psb.saveDSPARB, DSPARB);  in oaktrail_restore_display_registers()
300 	PSB_WVDC32(regs->psb.saveDSPFW1, DSPFW1);  in oaktrail_restore_display_registers()
301 	PSB_WVDC32(regs->psb.saveDSPFW2, DSPFW2);  in oaktrail_restore_display_registers()
302 	PSB_WVDC32(regs->psb.saveDSPFW3, DSPFW3);  in oaktrail_restore_display_registers()
303 	PSB_WVDC32(regs->psb.saveDSPFW4, DSPFW4);  in oaktrail_restore_display_registers()
304 	PSB_WVDC32(regs->psb.saveDSPFW5, DSPFW5);  in oaktrail_restore_display_registers()
305 	PSB_WVDC32(regs->psb.saveDSPFW6, DSPFW6);  in oaktrail_restore_display_registers()
306 	PSB_WVDC32(regs->psb.saveCHICKENBIT, DSPCHICKENBIT);  in oaktrail_restore_display_registers()
327 	PSB_WVDC32(regs->psb.saveBCLRPAT_A, BCLRPAT_A);  in oaktrail_restore_display_registers()
330 	PSB_WVDC32(regs->psb.savePERF_MODE, MRST_PERF_MODE);  in oaktrail_restore_display_registers()
346 	PSB_WVDC32(regs->psb.saveDSPACURSOR_CTRL, CURACNTR);  in oaktrail_restore_display_registers()
347 	PSB_WVDC32(regs->psb.saveDSPACURSOR_POS, CURAPOS);  in oaktrail_restore_display_registers()
348 	PSB_WVDC32(regs->psb.saveDSPACURSOR_BASE, CURABASE);  in oaktrail_restore_display_registers()
358 		PSB_WVDC32(regs->saveBLC_PWM_CTL2, BLC_PWM_CTL2);  in oaktrail_restore_display_registers()
359 		PSB_WVDC32(regs->psb.saveLVDS, LVDS); /*port 61180h*/  in oaktrail_restore_display_registers()
360 		PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL);  in oaktrail_restore_display_registers()
361 		PSB_WVDC32(regs->psb.savePFIT_PGM_RATIOS, PFIT_PGM_RATIOS);  in oaktrail_restore_display_registers()
362 		PSB_WVDC32(regs->psb.savePFIT_AUTO_RATIOS, PFIT_AUTO_RATIOS);  in oaktrail_restore_display_registers()
363 		PSB_WVDC32(regs->saveBLC_PWM_CTL, BLC_PWM_CTL);  in oaktrail_restore_display_registers()
364 		PSB_WVDC32(regs->psb.savePP_ON_DELAYS, LVDSPP_ON);  in oaktrail_restore_display_registers()
365 		PSB_WVDC32(regs->psb.savePP_OFF_DELAYS, LVDSPP_OFF);  in oaktrail_restore_display_registers()
366 		PSB_WVDC32(regs->psb.savePP_DIVISOR, PP_CYCLE);  in oaktrail_restore_display_registers()
367 		PSB_WVDC32(regs->psb.savePP_CONTROL, PP_CONTROL);  in oaktrail_restore_display_registers()
381 	PSB_WVDC32(regs->psb.saveOV_OVADD, OV_OVADD);  in oaktrail_restore_display_registers()
382 	PSB_WVDC32(regs->psb.saveOV_OGAMC0, OV_OGAMC0);  in oaktrail_restore_display_registers()
383 	PSB_WVDC32(regs->psb.saveOV_OGAMC1, OV_OGAMC1);  in oaktrail_restore_display_registers()
384 	PSB_WVDC32(regs->psb.saveOV_OGAMC2, OV_OGAMC2);  in oaktrail_restore_display_registers()
385 	PSB_WVDC32(regs->psb.saveOV_OGAMC3, OV_OGAMC3);  in oaktrail_restore_display_registers()
386 	PSB_WVDC32(regs->psb.saveOV_OGAMC4, OV_OGAMC4);  in oaktrail_restore_display_registers()
387 	PSB_WVDC32(regs->psb.saveOV_OGAMC5, OV_OGAMC5);  in oaktrail_restore_display_registers()
390 	PSB_WVDC32(regs->psb.saveHISTOGRAM_INT_CONTROL_REG,  in oaktrail_restore_display_registers()
392 	PSB_WVDC32(regs->psb.saveHISTOGRAM_LOGIC_CONTROL_REG,  in oaktrail_restore_display_registers()
394 	PSB_WVDC32(regs->psb.savePWM_CONTROL_LOGIC, PWM_CONTROL_LOGIC);  in oaktrail_restore_display_registers()