1652 	crtc_state->active_planes = 0;  in fixup_plane_bitmasks()
1657 		crtc_state->active_planes |= BIT(to_intel_plane(plane)->id);  in fixup_plane_bitmasks()
1700 	if (DISPLAY_VER(dev_priv) == 2 && !crtc_state->active_planes)  in intel_plane_disable_noatomic()
2479 	drm_WARN_ON(dev, !(crtc_state->active_planes & ~BIT(PLANE_CURSOR)));  in hsw_enable_ips()
2630 	return (!old_crtc_state->active_planes || intel_crtc_needs_modeset(new_crtc_state)) &&  in planes_enabling()
2631 		new_crtc_state->active_planes;  in planes_enabling()
2637 	return old_crtc_state->active_planes &&  in planes_disabling()
2638 		(!new_crtc_state->active_planes || intel_crtc_needs_modeset(new_crtc_state));  in planes_disabling()
4156 	if (!(crtc_state->active_planes & ~BIT(PLANE_CURSOR)))  in hsw_compute_ips_config()
5656 	    (crtc_state->active_planes & ~(icl_hdr_plane_mask() |  in bdw_set_pipemisc()
6969 			crtc_state->active_planes &= ~BIT(plane->id);  in icl_check_nv12_planes()
6990 			if (crtc_state->active_planes & BIT(linked->id))  in icl_check_nv12_planes()
7013 		crtc_state->active_planes |= BIT(linked->id);  in icl_check_nv12_planes()
9113 		crtc_state->update_planes |= crtc_state->active_planes;  in intel_modeset_all_pipes()
9456 		old_active_planes = old_crtc_state->active_planes & ~BIT(PLANE_CURSOR);  in intel_atomic_check_planes()
9457 		new_active_planes = new_crtc_state->active_planes & ~BIT(PLANE_CURSOR);  in intel_atomic_check_planes()
9663 		if (old_crtc_state->active_planes != new_crtc_state->active_planes) {  in intel_atomic_check_async()
10044 	if (DISPLAY_VER(dev_priv) != 2 || crtc_state->active_planes)  in intel_crtc_arm_fifo_underrun()