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Lines Matching refs:asyh

417 	struct nv50_head_atom *asyh = nv50_head_atom(crtc_state);  in nv50_outp_atomic_fix_depth()  local
419 struct drm_display_mode *mode = &asyh->state.adjusted_mode; in nv50_outp_atomic_fix_depth()
427 asyh->or.bpc = min_t(u8, asyh->or.bpc, 10); in nv50_outp_atomic_fix_depth()
430 while (asyh->or.bpc > 6) { in nv50_outp_atomic_fix_depth()
431 mode_rate = DIV_ROUND_UP(mode->clock * asyh->or.bpc * 3, 8); in nv50_outp_atomic_fix_depth()
435 asyh->or.bpc -= 2; in nv50_outp_atomic_fix_depth()
450 struct nv50_head_atom *asyh = nv50_head_atom(crtc_state); in nv50_outp_atomic_check() local
459 asyh->or.bpc = connector->display_info.bpc; in nv50_outp_atomic_check()
535 struct nv50_head_atom *asyh = in nv50_dac_atomic_enable() local
554 core->func->dac->ctrl(core, nv_encoder->or, ctrl, asyh); in nv50_dac_atomic_enable()
555 asyh->or.depth = 0; in nv50_dac_atomic_enable()
1077 struct nv50_head_atom *asyh = nv50_head_atom(crtc_state); in nv50_msto_atomic_check() local
1097 asyh->or.bpc = connector->display_info.bpc; in nv50_msto_atomic_check()
1098 asyh->dp.pbn = drm_dp_calc_pbn_mode(clock, asyh->or.bpc * 3, in nv50_msto_atomic_check()
1103 asyh->dp.pbn, 0); in nv50_msto_atomic_check()
1107 asyh->dp.tu = slots; in nv50_msto_atomic_check()
1128 struct nv50_head_atom *asyh = in nv50_msto_atomic_enable() local
1150 r = drm_dp_mst_allocate_vcpi(&mstm->mgr, mstc->port, asyh->dp.pbn, asyh->dp.tu); in nv50_msto_atomic_enable()
1162 mstm->outp->update(mstm->outp, head->base.index, asyh, proto, in nv50_msto_atomic_enable()
1163 nv50_dp_bpc_to_depth(asyh->or.bpc)); in nv50_msto_atomic_enable()
1667 struct nv50_head_atom *asyh, u8 proto, u8 depth) in nv50_sor_update() argument
1672 if (!asyh) { in nv50_sor_update()
1679 asyh->or.depth = depth; in nv50_sor_update()
1682 core->func->sor->ctrl(core, nv_encoder->or, nv_encoder->ctrl, asyh); in nv50_sor_update()
1735 struct nv50_head_atom *asyh = in nv50_sor_atomic_enable() local
1737 struct drm_display_mode *mode = &asyh->state.adjusted_mode; in nv50_sor_atomic_enable()
1813 if (asyh->or.bpc == 8) in nv50_sor_atomic_enable()
1820 depth = nv50_dp_bpc_to_depth(asyh->or.bpc); in nv50_sor_atomic_enable()
1842 nv_encoder->update(nv_encoder, nv_crtc->index, asyh, proto, depth); in nv50_sor_atomic_enable()
1987 struct nv50_head_atom *asyh = in nv50_pior_atomic_enable() local
2002 switch (asyh->or.bpc) { in nv50_pior_atomic_enable()
2003 case 10: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_30_444; break; in nv50_pior_atomic_enable()
2004 case 8: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_24_444; break; in nv50_pior_atomic_enable()
2005 case 6: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_BPP_18_444; break; in nv50_pior_atomic_enable()
2006 default: asyh->or.depth = NV837D_PIOR_SET_CONTROL_PIXEL_DEPTH_DEFAULT; break; in nv50_pior_atomic_enable()
2019 core->func->pior->ctrl(core, nv_encoder->or, ctrl, asyh); in nv50_pior_atomic_enable()
2176 struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state); in nv50_disp_atomic_commit_tail() local
2180 asyh->clr.mask, asyh->set.mask); in nv50_disp_atomic_commit_tail()
2187 if (asyh->clr.mask) { in nv50_disp_atomic_commit_tail()
2188 nv50_head_flush_clr(head, asyh, atom->flush_disable); in nv50_disp_atomic_commit_tail()
2267 struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state); in nv50_disp_atomic_commit_tail() local
2271 asyh->set.mask, asyh->clr.mask); in nv50_disp_atomic_commit_tail()
2273 if (asyh->set.mask) { in nv50_disp_atomic_commit_tail()
2274 nv50_head_flush_set(head, asyh); in nv50_disp_atomic_commit_tail()
2318 struct nv50_head_atom *asyh = nv50_head_atom(new_crtc_state); in nv50_disp_atomic_commit_tail() local
2322 asyh->set.mask, asyh->clr.mask); in nv50_disp_atomic_commit_tail()
2324 if (asyh->set.mask) { in nv50_disp_atomic_commit_tail()
2325 nv50_head_flush_set_wndw(head, asyh); in nv50_disp_atomic_commit_tail()
2554 struct nv50_head_atom *asyh; in nv50_disp_atomic_check() local
2565 asyh = nv50_head_atom(new_crtc_state); in nv50_disp_atomic_check()
2566 core->func->head->static_wndw_map(head, asyh); in nv50_disp_atomic_check()