Lines Matching refs:r9
36 ld b32 $r9 D[$r13 + 0x4] // PUT
38 cmpu b32 $r8 $r9
46 and $r8 $r9 7
54 add b32 $r9 1
55 and $r9 0xf
56 st b32 D[$r13 + 0x4] $r9
70 ld b32 $r9 D[$r13 + 0x4] // PUT
71 cmpu b32 $r8 $r9
74 and $r9 $r8 7
75 shl b32 $r9 3
76 add b32 $r9 $r13
77 add b32 $r9 8
78 ld b32 $r14 D[$r9 + 0x0]
79 ld b32 $r15 D[$r9 + 0x4]
159 clear b32 $r9
165 add b32 $r9 $r8
169 mov b32 $r15 $r9
186 clear b32 $r9
190 bset $r9 0 // BASE_EN
196 bset $r9 1 // MULTI_EN
217 or $r14 $r9
261 mov $r9 NV_PGRAPH_FECS_STRAND_CMD_ENABLE
262 nv_iowr(NV_PGRAPH_FECS_STRAND_CMD, 0x3f, $r9)
269 mov $r9 NV_PGRAPH_FECS_STRAND_CMD_DISABLE
270 nv_iowr(NV_PGRAPH_FECS_STRAND_CMD, 0x3f, $r9)
318 nv_iord($r9, NV_PGRAPH_FECS_STRANDS_CNT, 0x00)
328 sub b32 $r9 1