Lines Matching refs:pgpuobj
45 int align, struct nvkm_gpuobj **pgpuobj) in nv40_gr_object_bind() argument
48 false, parent, pgpuobj); in nv40_gr_object_bind()
50 nvkm_kmap(*pgpuobj); in nv40_gr_object_bind()
51 nvkm_wo32(*pgpuobj, 0x00, object->oclass); in nv40_gr_object_bind()
52 nvkm_wo32(*pgpuobj, 0x04, 0x00000000); in nv40_gr_object_bind()
53 nvkm_wo32(*pgpuobj, 0x08, 0x00000000); in nv40_gr_object_bind()
55 nvkm_mo32(*pgpuobj, 0x08, 0x01000000, 0x01000000); in nv40_gr_object_bind()
57 nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); in nv40_gr_object_bind()
58 nvkm_wo32(*pgpuobj, 0x10, 0x00000000); in nv40_gr_object_bind()
59 nvkm_done(*pgpuobj); in nv40_gr_object_bind()
75 int align, struct nvkm_gpuobj **pgpuobj) in nv40_gr_chan_bind() argument
80 align, true, parent, pgpuobj); in nv40_gr_chan_bind()
82 chan->inst = (*pgpuobj)->addr; in nv40_gr_chan_bind()
83 nvkm_kmap(*pgpuobj); in nv40_gr_chan_bind()
84 nv40_grctx_fill(gr->base.engine.subdev.device, *pgpuobj); in nv40_gr_chan_bind()
85 nvkm_wo32(*pgpuobj, 0x00000, chan->inst >> 4); in nv40_gr_chan_bind()
86 nvkm_done(*pgpuobj); in nv40_gr_chan_bind()