Lines Matching refs:clk
160 gm20b_pllg_read_mnp(struct gm20b_clk *clk, struct gm20b_pll *pll) in gm20b_pllg_read_mnp() argument
162 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_pllg_read_mnp()
166 gk20a_pllg_read_mnp(&clk->base, &pll->base); in gm20b_pllg_read_mnp()
173 gm20b_pllg_write_mnp(struct gm20b_clk *clk, const struct gm20b_pll *pll) in gm20b_pllg_write_mnp() argument
175 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_pllg_write_mnp()
179 gk20a_pllg_write_mnp(&clk->base, &pll->base); in gm20b_pllg_write_mnp()
189 gm20b_dvfs_calc_det_coeff(struct gm20b_clk *clk, s32 uv, in gm20b_dvfs_calc_det_coeff() argument
192 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_dvfs_calc_det_coeff()
193 const struct gm20b_clk_dvfs_params *p = clk->dvfs_params; in gm20b_dvfs_calc_det_coeff()
203 dvfs->dfs_ext_cal = DIV_ROUND_CLOSEST(uv - clk->uvdet_offs, in gm20b_dvfs_calc_det_coeff()
204 clk->uvdet_slope); in gm20b_dvfs_calc_det_coeff()
225 gm20b_dvfs_calc_ndiv(struct gm20b_clk *clk, u32 n_eff, u32 *n_int, u32 *sdm_din) in gm20b_dvfs_calc_ndiv() argument
227 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_dvfs_calc_ndiv()
228 const struct gk20a_clk_pllg_params *p = clk->base.params; in gm20b_dvfs_calc_ndiv()
234 det_delta = DIV_ROUND_CLOSEST(((s32)clk->uv) - clk->uvdet_offs, in gm20b_dvfs_calc_ndiv()
235 clk->uvdet_slope); in gm20b_dvfs_calc_ndiv()
236 det_delta -= clk->dvfs.dfs_ext_cal; in gm20b_dvfs_calc_ndiv()
237 det_delta = min(det_delta, clk->dvfs.dfs_det_max); in gm20b_dvfs_calc_ndiv()
238 det_delta *= clk->dvfs.dfs_coeff; in gm20b_dvfs_calc_ndiv()
266 gm20b_pllg_slide(struct gm20b_clk *clk, u32 n) in gm20b_pllg_slide() argument
268 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_pllg_slide()
275 gm20b_dvfs_calc_ndiv(clk, n, &n_int, &sdm_din); in gm20b_pllg_slide()
278 gm20b_pllg_read_mnp(clk, &pll); in gm20b_pllg_slide()
294 gk20a_pllg_write_mnp(&clk->base, &pll.base); in gm20b_pllg_slide()
322 gm20b_pllg_enable(struct gm20b_clk *clk) in gm20b_pllg_enable() argument
324 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_pllg_enable()
345 gm20b_pllg_disable(struct gm20b_clk *clk) in gm20b_pllg_disable() argument
347 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_pllg_disable()
360 gm20b_pllg_program_mnp(struct gm20b_clk *clk, const struct gk20a_pll *pll) in gm20b_pllg_program_mnp() argument
362 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_pllg_program_mnp()
370 gm20b_dvfs_calc_ndiv(clk, pll->n, &n_int, &sdm_din); in gm20b_pllg_program_mnp()
371 gm20b_pllg_read_mnp(clk, &cur_pll); in gm20b_pllg_program_mnp()
376 if (!gk20a_pllg_is_enabled(&clk->base)) in gm20b_pllg_program_mnp()
401 gk20a_pllg_write_mnp(&clk->base, &cur_pll.base); in gm20b_pllg_program_mnp()
405 gk20a_pllg_write_mnp(&clk->base, &cur_pll.base); in gm20b_pllg_program_mnp()
408 gm20b_pllg_disable(clk); in gm20b_pllg_program_mnp()
413 gm20b_pllg_write_mnp(clk, &cur_pll); in gm20b_pllg_program_mnp()
415 ret = gm20b_pllg_enable(clk); in gm20b_pllg_program_mnp()
433 gm20b_pllg_program_mnp_slide(struct gm20b_clk *clk, const struct gk20a_pll *pll) in gm20b_pllg_program_mnp_slide() argument
438 if (gk20a_pllg_is_enabled(&clk->base)) { in gm20b_pllg_program_mnp_slide()
439 gk20a_pllg_read_mnp(&clk->base, &cur_pll); in gm20b_pllg_program_mnp_slide()
443 return gm20b_pllg_slide(clk, pll->n); in gm20b_pllg_program_mnp_slide()
446 cur_pll.n = gk20a_pllg_n_lo(&clk->base, &cur_pll); in gm20b_pllg_program_mnp_slide()
447 ret = gm20b_pllg_slide(clk, cur_pll.n); in gm20b_pllg_program_mnp_slide()
454 cur_pll.n = gk20a_pllg_n_lo(&clk->base, &cur_pll); in gm20b_pllg_program_mnp_slide()
455 ret = gm20b_pllg_program_mnp(clk, &cur_pll); in gm20b_pllg_program_mnp_slide()
460 return gm20b_pllg_slide(clk, pll->n); in gm20b_pllg_program_mnp_slide()
466 struct gm20b_clk *clk = gm20b_clk(base); in gm20b_clk_calc() local
471 ret = gk20a_pllg_calc_mnp(&clk->base, cstate->domain[nv_clk_src_gpc] * in gm20b_clk_calc()
472 GK20A_CLK_GPC_MDIV, &clk->new_pll); in gm20b_clk_calc()
476 clk->new_uv = volt->vid[cstate->voltage].uv; in gm20b_clk_calc()
477 gm20b_dvfs_calc_det_coeff(clk, clk->new_uv, &clk->new_dvfs); in gm20b_clk_calc()
479 nvkm_debug(subdev, "%s uv: %d uv\n", __func__, clk->new_uv); in gm20b_clk_calc()
488 gm20b_dvfs_calc_safe_pll(struct gm20b_clk *clk, struct gk20a_pll *pll) in gm20b_dvfs_calc_safe_pll() argument
490 u32 rate = gk20a_pllg_calc_rate(&clk->base, pll) / KHZ; in gm20b_dvfs_calc_safe_pll()
491 u32 parent_rate = clk->base.parent_rate / KHZ; in gm20b_dvfs_calc_safe_pll()
495 if (rate > clk->safe_fmax_vmin) in gm20b_dvfs_calc_safe_pll()
501 nmin = DIV_ROUND_UP(pll->m * clk->base.params->min_vco, parent_rate); in gm20b_dvfs_calc_safe_pll()
502 nsafe = pll->m * rate / (clk->base.parent_rate); in gm20b_dvfs_calc_safe_pll()
513 gm20b_dvfs_program_coeff(struct gm20b_clk *clk, u32 coeff) in gm20b_dvfs_program_coeff() argument
515 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_dvfs_program_coeff()
531 gm20b_dvfs_program_ext_cal(struct gm20b_clk *clk, u32 dfs_det_cal) in gm20b_dvfs_program_ext_cal() argument
533 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_dvfs_program_ext_cal()
549 gm20b_dvfs_program_dfs_detection(struct gm20b_clk *clk, in gm20b_dvfs_program_dfs_detection() argument
552 struct nvkm_device *device = clk->base.base.subdev.device; in gm20b_dvfs_program_dfs_detection()
568 gm20b_dvfs_program_ext_cal(clk, dvfs->dfs_ext_cal); in gm20b_dvfs_program_dfs_detection()
574 struct gm20b_clk *clk = gm20b_clk(base); in gm20b_clk_prog() local
579 if (clk->uv == clk->new_uv) in gm20b_clk_prog()
601 cur_freq = nvkm_clk_read(&clk->base.base, nv_clk_src_gpc); in gm20b_clk_prog()
602 if (cur_freq > clk->safe_fmax_vmin) { in gm20b_clk_prog()
605 if (clk->uv < clk->new_uv) in gm20b_clk_prog()
607 pll_safe = clk->base.pll; in gm20b_clk_prog()
610 pll_safe = clk->new_pll; in gm20b_clk_prog()
612 gm20b_dvfs_calc_safe_pll(clk, &pll_safe); in gm20b_clk_prog()
613 ret = gm20b_pllg_program_mnp_slide(clk, &pll_safe); in gm20b_clk_prog()
624 gm20b_dvfs_program_coeff(clk, 0); in gm20b_clk_prog()
625 gm20b_dvfs_program_ext_cal(clk, clk->new_dvfs.dfs_ext_cal); in gm20b_clk_prog()
626 gm20b_dvfs_program_coeff(clk, clk->new_dvfs.dfs_coeff); in gm20b_clk_prog()
627 gm20b_dvfs_program_dfs_detection(clk, &clk->new_dvfs); in gm20b_clk_prog()
630 clk->uv = clk->new_uv; in gm20b_clk_prog()
631 clk->dvfs = clk->new_dvfs; in gm20b_clk_prog()
632 clk->base.pll = clk->new_pll; in gm20b_clk_prog()
634 return gm20b_pllg_program_mnp_slide(clk, &clk->base.pll); in gm20b_clk_prog()
723 struct gm20b_clk *clk = gm20b_clk(base); in gm20b_clk_fini() local
726 if (gk20a_pllg_is_enabled(&clk->base)) { in gm20b_clk_fini()
730 gk20a_pllg_read_mnp(&clk->base, &pll); in gm20b_clk_fini()
731 n_lo = gk20a_pllg_n_lo(&clk->base, &pll); in gm20b_clk_fini()
732 gm20b_pllg_slide(clk, n_lo); in gm20b_clk_fini()
735 gm20b_pllg_disable(clk); in gm20b_clk_fini()
742 gm20b_clk_init_dvfs(struct gm20b_clk *clk) in gm20b_clk_init_dvfs() argument
744 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_clk_init_dvfs()
746 bool fused = clk->uvdet_offs && clk->uvdet_slope; in gm20b_clk_init_dvfs()
756 if (clk->dvfs_params->vco_ctrl) in gm20b_clk_init_dvfs()
758 clk->dvfs_params->vco_ctrl << GPCPLL_CFG3_VCO_CTRL_SHIFT); in gm20b_clk_init_dvfs()
790 clk->uvdet_slope = ADC_SLOPE_UV; in gm20b_clk_init_dvfs()
791 clk->uvdet_offs = ((s32)clk->uv) - data * ADC_SLOPE_UV; in gm20b_clk_init_dvfs()
794 clk->uvdet_offs, clk->uvdet_slope); in gm20b_clk_init_dvfs()
798 gm20b_dvfs_calc_det_coeff(clk, clk->uv, &clk->dvfs); in gm20b_clk_init_dvfs()
799 gm20b_dvfs_program_coeff(clk, 0); in gm20b_clk_init_dvfs()
800 gm20b_dvfs_program_ext_cal(clk, clk->dvfs.dfs_ext_cal); in gm20b_clk_init_dvfs()
801 gm20b_dvfs_program_coeff(clk, clk->dvfs.dfs_coeff); in gm20b_clk_init_dvfs()
802 gm20b_dvfs_program_dfs_detection(clk, &clk->new_dvfs); in gm20b_clk_init_dvfs()
813 struct gk20a_clk *clk = gk20a_clk(base); in gm20b_clk_init() local
814 struct nvkm_subdev *subdev = &clk->base.subdev; in gm20b_clk_init()
832 ret = gk20a_clk_setup_slide(clk); in gm20b_clk_init()
851 if (clk->base.func == &gm20b_clk) { in gm20b_clk_init()
914 struct gk20a_clk *clk; in gm20b_clk_new_speedo0() local
917 clk = kzalloc(sizeof(*clk), GFP_KERNEL); in gm20b_clk_new_speedo0()
918 if (!clk) in gm20b_clk_new_speedo0()
920 *pclk = &clk->base; in gm20b_clk_new_speedo0()
922 ret = gk20a_clk_ctor(device, type, inst, &gm20b_clk_speedo0, &gm20b_pllg_params, clk); in gm20b_clk_new_speedo0()
923 clk->pl_to_div = pl_to_div; in gm20b_clk_new_speedo0()
924 clk->div_to_pl = div_to_pl; in gm20b_clk_new_speedo0()
942 gm20b_clk_init_fused_params(struct gm20b_clk *clk) in gm20b_clk_init_fused_params() argument
944 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_clk_init_fused_params()
959 clk->uvdet_slope = ((val >> FUSE_RESERVED_CALIB0_SLOPE_INT_SHIFT) & in gm20b_clk_init_fused_params()
965 clk->uvdet_offs = ((val >> FUSE_RESERVED_CALIB0_INTERCEPT_INT_SHIFT) & in gm20b_clk_init_fused_params()
971 clk->uvdet_slope, clk->uvdet_offs); in gm20b_clk_init_fused_params()
976 gm20b_clk_init_safe_fmax(struct gm20b_clk *clk) in gm20b_clk_init_safe_fmax() argument
978 struct nvkm_subdev *subdev = &clk->base.base.subdev; in gm20b_clk_init_safe_fmax()
980 struct nvkm_pstate *pstates = clk->base.base.func->pstates; in gm20b_clk_init_safe_fmax()
981 int nr_pstates = clk->base.base.func->nr_pstates; in gm20b_clk_init_safe_fmax()
1007 clk->safe_fmax_vmin = fmax * (100 - 10) / 100; in gm20b_clk_init_safe_fmax()
1008 nvkm_debug(subdev, "safe fmax @ vmin = %u Khz\n", clk->safe_fmax_vmin); in gm20b_clk_init_safe_fmax()
1018 struct gm20b_clk *clk; in gm20b_clk_new() local
1028 clk = kzalloc(sizeof(*clk) + sizeof(*clk_params), GFP_KERNEL); in gm20b_clk_new()
1029 if (!clk) in gm20b_clk_new()
1031 *pclk = &clk->base.base; in gm20b_clk_new()
1032 subdev = &clk->base.base.subdev; in gm20b_clk_new()
1035 clk_params = (void *) (clk + 1); in gm20b_clk_new()
1037 ret = gk20a_clk_ctor(device, type, inst, &gm20b_clk, clk_params, &clk->base); in gm20b_clk_new()
1046 (clk->base.parent_rate / KHZ)); in gm20b_clk_new()
1049 kfree(clk); in gm20b_clk_new()
1053 clk->base.pl_to_div = pl_to_div; in gm20b_clk_new()
1054 clk->base.div_to_pl = div_to_pl; in gm20b_clk_new()
1056 clk->dvfs_params = &gm20b_dvfs_params; in gm20b_clk_new()
1058 ret = gm20b_clk_init_fused_params(clk); in gm20b_clk_new()
1066 ret = gm20b_clk_init_safe_fmax(clk); in gm20b_clk_new()